132 lines
5.9 KiB
XML
132 lines
5.9 KiB
XML
|
<?xml version="1.0" encoding="UTF-8"?>
|
||
|
|
<deploy
|
||
|
|
date="2023.06.07.19:47:52"
|
||
|
|
outputDirectory="/auto/work/qinliqing/intelFPGA_lite/19.1/hit_pat/clkctrl/">
|
||
|
|
<perimeter>
|
||
|
|
<parameter
|
||
|
|
name="AUTO_GENERATION_ID"
|
||
|
|
type="Integer"
|
||
|
|
defaultValue="0"
|
||
|
|
onHdl="0"
|
||
|
|
affectsHdl="1" />
|
||
|
|
<parameter
|
||
|
|
name="AUTO_UNIQUE_ID"
|
||
|
|
type="String"
|
||
|
|
defaultValue=""
|
||
|
|
onHdl="0"
|
||
|
|
affectsHdl="1" />
|
||
|
|
<parameter
|
||
|
|
name="AUTO_DEVICE_FAMILY"
|
||
|
|
type="String"
|
||
|
|
defaultValue="MAX 10"
|
||
|
|
onHdl="0"
|
||
|
|
affectsHdl="1" />
|
||
|
|
<parameter
|
||
|
|
name="AUTO_DEVICE"
|
||
|
|
type="String"
|
||
|
|
defaultValue="10M50DAF484C6GES"
|
||
|
|
onHdl="0"
|
||
|
|
affectsHdl="1" />
|
||
|
|
<parameter
|
||
|
|
name="AUTO_DEVICE_SPEEDGRADE"
|
||
|
|
type="String"
|
||
|
|
defaultValue="6"
|
||
|
|
onHdl="0"
|
||
|
|
affectsHdl="1" />
|
||
|
|
<interface name="altclkctrl_input" kind="conduit" start="0">
|
||
|
|
<property name="associatedClock" value="" />
|
||
|
|
<property name="associatedReset" value="" />
|
||
|
|
<port name="inclk" direction="input" role="inclk" width="1" />
|
||
|
|
</interface>
|
||
|
|
<interface name="altclkctrl_output" kind="conduit" start="0">
|
||
|
|
<property name="associatedClock" value="" />
|
||
|
|
<property name="associatedReset" value="" />
|
||
|
|
<port name="outclk" direction="output" role="outclk" width="1" />
|
||
|
|
</interface>
|
||
|
|
</perimeter>
|
||
|
|
<entity
|
||
|
|
path=""
|
||
|
|
parameterizationKey="clkctrl:1.0:AUTO_DEVICE=10M50DAF484C6GES,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=6,AUTO_GENERATION_ID=1686160072,AUTO_UNIQUE_ID=(altclkctrl:19.1:CLOCK_TYPE=1,DEVICE_FAMILY=MAX 10,ENA_REGISTER_MODE=1,GUI_USE_ENA=false,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false)"
|
||
|
|
instancePathKey="clkctrl"
|
||
|
|
kind="clkctrl"
|
||
|
|
version="1.0"
|
||
|
|
name="clkctrl">
|
||
|
|
<parameter name="AUTO_GENERATION_ID" value="1686160072" />
|
||
|
|
<parameter name="AUTO_DEVICE" value="10M50DAF484C6GES" />
|
||
|
|
<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
|
||
|
|
<parameter name="AUTO_UNIQUE_ID" value="" />
|
||
|
|
<parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
|
||
|
|
<generatedFiles>
|
||
|
|
<file
|
||
|
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/hit_pat/clkctrl/synthesis/clkctrl.v"
|
||
|
|
type="VERILOG" />
|
||
|
|
</generatedFiles>
|
||
|
|
<childGeneratedFiles>
|
||
|
|
<file
|
||
|
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/hit_pat/clkctrl/synthesis/submodules/clkctrl_altclkctrl_0.v"
|
||
|
|
type="VERILOG"
|
||
|
|
attributes="" />
|
||
|
|
</childGeneratedFiles>
|
||
|
|
<sourceFiles>
|
||
|
|
<file path="/auto/work/qinliqing/intelFPGA_lite/19.1/hit_pat/clkctrl.qsys" />
|
||
|
|
</sourceFiles>
|
||
|
|
<childSourceFiles>
|
||
|
|
<file
|
||
|
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/ip/altera/megafunctions/altclkctrl/altclkctrl_hw.tcl" />
|
||
|
|
</childSourceFiles>
|
||
|
|
<messages>
|
||
|
|
<message level="Debug" culprit="clkctrl">queue size: 0 starting:clkctrl "clkctrl"</message>
|
||
|
|
<message level="Progress" culprit="min"></message>
|
||
|
|
<message level="Progress" culprit="max"></message>
|
||
|
|
<message level="Progress" culprit="current"></message>
|
||
|
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
||
|
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
||
|
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>1</b> modules, <b>0</b> connections]]></message>
|
||
|
|
<message level="Debug">Transform: MMTransform</message>
|
||
|
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
||
|
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
||
|
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
||
|
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
||
|
|
<message level="Debug">Transform: ResetAdaptation</message>
|
||
|
|
<message level="Debug" culprit="clkctrl"><![CDATA["<b>clkctrl</b>" reuses <b>altclkctrl</b> "<b>submodules/clkctrl_altclkctrl_0</b>"]]></message>
|
||
|
|
<message level="Debug" culprit="clkctrl">queue size: 0 starting:altclkctrl "submodules/clkctrl_altclkctrl_0"</message>
|
||
|
|
<message level="Info" culprit="altclkctrl_0">Generating top-level entity clkctrl_altclkctrl_0.</message>
|
||
|
|
<message level="Debug" culprit="altclkctrl_0">Current quartus bindir: /auto/work/qinliqing/intelFPGA_lite/19.1/quartus/linux64/.</message>
|
||
|
|
<message level="Info" culprit="altclkctrl_0"><![CDATA["<b>clkctrl</b>" instantiated <b>altclkctrl</b> "<b>altclkctrl_0</b>"]]></message>
|
||
|
|
</messages>
|
||
|
|
</entity>
|
||
|
|
<entity
|
||
|
|
path="submodules/"
|
||
|
|
parameterizationKey="altclkctrl:19.1:CLOCK_TYPE=1,DEVICE_FAMILY=MAX 10,ENA_REGISTER_MODE=1,GUI_USE_ENA=false,NUMBER_OF_CLOCKS=1,USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION=false"
|
||
|
|
instancePathKey="clkctrl:.:altclkctrl_0"
|
||
|
|
kind="altclkctrl"
|
||
|
|
version="19.1"
|
||
|
|
name="clkctrl_altclkctrl_0">
|
||
|
|
<parameter name="NUMBER_OF_CLOCKS" value="1" />
|
||
|
|
<parameter name="USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION" value="false" />
|
||
|
|
<parameter name="GUI_USE_ENA" value="false" />
|
||
|
|
<parameter name="DEVICE_FAMILY" value="MAX 10" />
|
||
|
|
<parameter name="ENA_REGISTER_MODE" value="1" />
|
||
|
|
<parameter name="CLOCK_TYPE" value="1" />
|
||
|
|
<generatedFiles>
|
||
|
|
<file
|
||
|
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/hit_pat/clkctrl/synthesis/submodules/clkctrl_altclkctrl_0.v"
|
||
|
|
type="VERILOG"
|
||
|
|
attributes="" />
|
||
|
|
</generatedFiles>
|
||
|
|
<childGeneratedFiles/>
|
||
|
|
<sourceFiles>
|
||
|
|
<file
|
||
|
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/ip/altera/megafunctions/altclkctrl/altclkctrl_hw.tcl" />
|
||
|
|
</sourceFiles>
|
||
|
|
<childSourceFiles/>
|
||
|
|
<instantiator instantiator="clkctrl" as="altclkctrl_0" />
|
||
|
|
<messages>
|
||
|
|
<message level="Debug" culprit="clkctrl">queue size: 0 starting:altclkctrl "submodules/clkctrl_altclkctrl_0"</message>
|
||
|
|
<message level="Info" culprit="altclkctrl_0">Generating top-level entity clkctrl_altclkctrl_0.</message>
|
||
|
|
<message level="Debug" culprit="altclkctrl_0">Current quartus bindir: /auto/work/qinliqing/intelFPGA_lite/19.1/quartus/linux64/.</message>
|
||
|
|
<message level="Info" culprit="altclkctrl_0"><![CDATA["<b>clkctrl</b>" instantiated <b>altclkctrl</b> "<b>altclkctrl_0</b>"]]></message>
|
||
|
|
</messages>
|
||
|
|
</entity>
|
||
|
|
</deploy>
|