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96 lines
5.6 KiB
96 lines
5.6 KiB
ID: 54037
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Name: RD - Stripping filtered - Sim09f 2017 - MD - B+->K*+mumu
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Type: Simulation
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State: Done
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Priority: 1a
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Author: nskidmor WG: RD
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Event type:
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Number of events:
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Starting Date: 2019-04-24
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Finalization Date: 2019-05-24
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Fast Simulation Type: None
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Retention Rate: 0.035
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Simulation Conditions: Beam6500GeV-2017-MagDown-Nu1.6-25ns-Pythia8
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Beam: beta*~3m, zpv=-1.36mm, xAngle=-0.395mrad and yAngle=0 Beam energy: 6500 GeV Generator: Pythia8 G4 settings: specified in sim step
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Magnetic field: -1 Detector: 2017, Velo closed around average x=0.81mm and y=-0.10mm Luminosity: pp collisions nu = 1.6, 25ns spillover
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Processing Pass: Sim09f/Trig0x62661709/Reco17/Turbo04a-WithTurcal/Stripping29r2Filtered/Merge14
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MC Version: 2017
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Step 1 Sim09f - 2017 - MD - Nu1.6 (Lumi 4 at 25ns) - 25ns spillover - Pythia8(138333/Sim09f) : Gauss-v49r12
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System config: x86_64-slc6-gcc48-opt MC TCK:
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Options: $APPCONFIGOPTS/Gauss/Beam6500GeV-md100-2017-nu1.6.py;$APPCONFIGOPTS/Gauss/EnableSpillover-25ns.py;$APPCONFIGOPTS/Gauss/DataType-2016.py;$APPCONFIGOPTS/Gauss/RICHRandomHits.py;$DECFILESROOT/options/@{eventType}.py;$LBPYTHIA8ROOT/options/Pythia8.py;$APPCONFIGOPTS/Gauss/G4PL_FTFP_BERT_EmNoCuts.py Options format: Multicore: N
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DDDB: dddb-20170721-3 Condition DB: sim-20180411-vc-md100 DQTag:
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Extra: AppConfig.v3r372;Gen/DecFiles.v30r29 Runtime projects:
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Visible: Y Usable:Yes
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Input file types: Output file types: SIM
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Step 2 Digi14c for 2015 - 25ns spillover(133533/Digi14c) : Boole-v30r3
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System config: x86_64-slc6-gcc49-opt MC TCK:
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Options: $APPCONFIGOPTS/Boole/Default.py;$APPCONFIGOPTS/Boole/EnableSpillover.py;$APPCONFIGOPTS/Boole/DataType-2015.py;$APPCONFIGOPTS/Boole/Boole-SetOdinRndTrigger.py Options format: Multicore: N
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DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
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Extra: AppConfig.v3r338 Runtime projects:
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Visible: N Usable:Yes
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Input file types: SIM Output file types: DIGI
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Step 3 L0 emulation for 2017 - TCK 0x1709 - DIGI(133514/L0Trig0x1709) : Moore-v26r6p1
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System config: x86_64-slc6-gcc62-opt MC TCK:
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Options: $APPCONFIGOPTS/L0App/L0AppSimProduction.py;$APPCONFIGOPTS/L0App/L0AppTCK-0x1709.py;$APPCONFIGOPTS/L0App/ForceLUTVersionV8.py;$APPCONFIGOPTS/L0App/DataType-2017.py Options format: l0app Multicore: N
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DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
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Extra: AppConfig.v3r356 Runtime projects:
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Visible: N Usable:Yes
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Input file types: DIGI Output file types: DIGI
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Step 4 TCK-0x51611709 (HLT1) Flagged for 2017 - DIGI(133515/Trig0x51611709) : Moore-v26r6p1
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System config: x86_64-slc6-gcc62-opt MC TCK:
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Options: $APPCONFIGOPTS/Moore/MooreSimProductionForSeparateL0AppStep2015.py;$APPCONFIGOPTS/Conditions/TCK-0x51611709.py;$APPCONFIGOPTS/Moore/DataType-2017.py;$APPCONFIGOPTS/Moore/MooreSimProductionHlt1.py Options format: Multicore: N
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DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
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Extra: AppConfig.v3r356 Runtime projects:
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Visible: N Usable:Yes
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Input file types: DIGI Output file types: DIGI
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Step 5 TCK-0x62661709 (HLT2) Flagged for 2017 - DIGI(137501/Trig0x62661709) : Moore-v26r6p1
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System config: x86_64-slc6-gcc62-opt MC TCK:
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Options: $APPCONFIGOPTS/Moore/MooreSimProductionForSeparateL0AppStep2015.py;$APPCONFIGOPTS/Conditions/TCK-0x62661709.py;$APPCONFIGOPTS/Moore/DataType-2017.py;$APPCONFIGOPTS/Moore/MooreSimProductionHlt2.py Options format: Multicore: N
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DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
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Extra: AppConfig.v3r369 Runtime projects:
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Visible: Y Usable:Yes
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Input file types: DIGI Output file types: DIGI
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Step 6 Reco17 for MC 2017(138326/Reco17) : Brunel-v52r6p1
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System config: x86_64-slc6-gcc62-opt MC TCK:
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Options: $APPCONFIGOPTS/Brunel/DataType-2017.py;$APPCONFIGOPTS/Brunel/MC-WithTruth.py;$APPCONFIGOPTS/Brunel/SplitRawEventOutput.4.3.py Options format: Multicore: N
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DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
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Extra: AppConfig.v3r338;Det/SQLDDDB.v7r10 Runtime projects:
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Visible: Y Usable:Yes
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Input file types: DIGI Output file types: DST
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Step 7 Turbo lines (MC) including TurCal, Turbo 2017 - uDST(137693/Turbo04a-WithTurcal) : DaVinci-v42r8p3
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System config: x86_64-slc6-gcc62-opt MC TCK:
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Options: $APPCONFIGOPTS/Turbo/Tesla_2017_LinesFromStreamsAndTurCal_MC.py;$APPCONFIGOPTS/Turbo/Tesla_Simulation_2017.py;$APPCONFIGOPTS/Turbo/Tesla_FilterMC.py Options format: Tesla Multicore: N
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DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
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Extra: AppConfig.v3r372;TurboStreamProd.v4r2p7 Runtime projects:
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Visible: Y Usable:Yes
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Input file types: DST Output file types: DST
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Step 8 Stripping29r2Filtered mDST for RDWG (B+->K*mumu) - Sim09(138187/Stripping29r2Filtered) : DaVinci-v42r8p1
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System config: x86_64-slc6-gcc49-opt MC TCK:
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Options: $RDCONFIGOPTS/FilterB2XMuMu-S29r2-mdst.py;$APPCONFIGOPTS/DaVinci/DataType-2017.py;APPCONFIGOPTS/DaVinci/InputType-DST.py Options format: Multicore: N
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DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
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Extra: AppConfig.v3r378;WG/RDConfig.v1r78 Runtime projects:
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Visible: Y Usable:Yes
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Input file types: DST Output file types: B2XMUMU.STRIP.MDST
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Step 9 Merge for B+->K*+mumu RD Filtered Productions - mDST(138385/Merge14) : DaVinci-v50r2
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System config: x86_64-slc6-gcc7-opt MC TCK:
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Options: $APPCONFIGOPTS/Merging/DVMergeDST.py;$APPCONFIGOPTS/DaVinci/DataType-2017.py;$APPCONFIGOPTS/Merging/WriteFSR.py;$APPCONFIGOPTS/Merging/MergeFSR.py;$APPCONFIGOPTS/Persistency/Compression-LZMA-4.py;$APPCONFIGOPTS/DaVinci/Simulation.py Options format: Merge Multicore: N
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DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag: fromPreviousStep
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Extra: AppConfig.v3r378 Runtime projects:
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Visible: Y Usable:Yes
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Input file types: B2XMUMU.STRIP.MDST Output file types: B2XMUMU.STRIP.MDST
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Inform also: david.gerick@cern.ch
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Comments
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https://its.cern.ch/jira/browse/LHCBGAUSS-1601
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