ID: 58730
Name: Filtered MC RD Sim09h 2015 - MD - Pythia6 (Gerick)
Type: Simulation
State: Done
Priority: 1a
Author: nskidmor WG: RD
Event type:
Number of events:
Starting Date: 2019-08-09
Finalization Date: 2019-09-20
Fast Simulation Type: None
Retention Rate: 0.035

Simulation Conditions: Beam6500GeV-2015-MagDown-Nu1.6-25ns-Pythia6
Beam: beta*~3m, zpv=8.64mm, xAngle=-0.395mrad and yAngle=0 Beam energy: 6500 GeV Generator: Pythia6 G4 settings: specified in sim step
Magnetic field: -1 Detector: 2015, Velo closed around average x=0.788mm and y=0.091mm Luminosity: pp collisions nu = 1.6, 25ns spillover

Processing Pass: Sim09h/Trig0x411400a2/Reco15a/Turbo02/Stripping24r1Filtered
MC Version: 2015
Step 1 Sim09h - 2015 Nominal - MD - Nu1.6 (Lumi 4 at 25ns) - 25ns spillover - Pythia6(139163/Sim09h) : Gauss-v49r14
System config: x86_64-slc6-gcc48-opt MC TCK:
Options: $APPCONFIGOPTS/Gauss/Beam6500GeV-md100-2015-nu1.6.py;$APPCONFIGOPTS/Gauss/EnableSpillover-25ns.py;$APPCONFIGOPTS/Gauss/DataType-2015.py;$APPCONFIGOPTS/Gauss/RICHRandomHits.py;$DECFILESROOT/options/@{eventType}.py;$LBPYTHIAROOT/options/Pythia.py;$APPCONFIGOPTS/Gauss/G4PL_FTFP_BERT_EmNoCuts.py Options format: Multicore: N
DDDB: dddb-20170721-3 Condition DB: sim-20161124-vc-md100 DQTag:
Extra: AppConfig.v3r383;Gen/DecFiles.v30r32 Runtime projects:
Visible: Y Usable:Yes
Input file types: Output file types: SIM

Step 2 Digi14c for 2015 - 25ns spillover(137780/Digi14c) : Boole-v30r4
System config: x86_64-slc6-gcc49-opt MC TCK:
Options: $APPCONFIGOPTS/Boole/Default.py;$APPCONFIGOPTS/Boole/EnableSpillover.py;$APPCONFIGOPTS/Boole/DataType-2015.py;$APPCONFIGOPTS/Boole/Boole-SetOdinRndTrigger.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r374 Runtime projects:
Visible: N Usable:Yes
Input file types: SIM Output file types: DIGI

Step 3 L0 emulation for 2015 - TCK 0x00a2(129526/L0Trig0x00a2) : Moore-v24r2
System config: x86_64-slc6-gcc48-opt MC TCK:
Options: $APPCONFIGOPTS/L0App/L0AppSimProduction.py;$APPCONFIGOPTS/L0App/L0AppTCK-0x00a2.py;$APPCONFIGOPTS/L0App/ForceLUTVersionV8.py;$APPCONFIGOPTS/L0App/DataType-2015.py;$APPCONFIGOPTS/Persistency/Compression-ZLIB-1.py Options format: l0app Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r268 Runtime projects:
Visible: N Usable:Yes
Input file types: DIGI(N) Output file types: DIGI(N)

Step 4 TCK-0x411400a2 Flagged for 2015(129527/Trig0x411400a2) : Moore-v24r2
System config: x86_64-slc6-gcc48-opt MC TCK:
Options: $APPCONFIGOPTS/Moore/MooreSimProductionForSeparateL0AppStep2015.py;$APPCONFIGOPTS/Conditions/TCK-0x411400a2.py;$APPCONFIGOPTS/Moore/DataType-2015.py;$APPCONFIGOPTS/Persistency/Compression-ZLIB-1.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r268 Runtime projects:
Visible: Y Usable:Yes
Input file types: DIGI(N) Output file types: DIGI(N)

Step 5 Reco15a for MC 2015(138372/Reco15a) : Brunel-v48r3
System config: x86_64-slc6-gcc49-opt MC TCK:
Options: $APPCONFIGOPTS/Brunel/DataType-2015.py;$APPCONFIGOPTS/Brunel/MC-WithTruth.py;$APPCONFIGOPTS/Persistency/Compression-ZLIB-1.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r376;Det/SQLDDDB.v7r10 Runtime projects:
Visible: Y Usable:Yes
Input file types: DIGI Output file types: DST

Step 6 Turbo lines (MC), Turbo 2015 reprocessing(129522/Turbo02) : DaVinci-v40r1p3
System config: x86_64-slc6-gcc48-opt MC TCK:
Options: $APPCONFIGOPTS/Turbo/Tesla_AllHlt2Lines_v10r0_0x00fa0051.py;$APPCONFIGOPTS/Turbo/Tesla_Simulation_2015_PVHLT2.py Options format: Tesla Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r232;TurboStreamProd.v2r0 Runtime projects:
Visible: Y Usable:Yes
Input file types: DST(N) Output file types: DST(N)

Step 7 Stripping24r1Filtered mDST for RDWG (Gerick) (139365/Stripping24r1Filtered) : DaVinci-v38r1p7
System config: x86_64-slc6-gcc49-opt MC TCK:
Options: $RDCONFIGOPTS/FilterB2XMuMu-S24r1-mdst.py;$APPCONFIGOPTS/DaVinci/DataType-2015.py;APPCONFIGOPTS/DaVinci/InputType-DST.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r384;WG/RDConfig.v1r78 Runtime projects:
Visible: Y Usable:Yes
Input file types: DST Output file types: B2XMUMU.STRIP.MDST

Step 8 Merge for RD Filtered Productions (Gerick) - DST(139366/Merge14) : DaVinci-v45r0
System config: x86_64-slc6-gcc8-opt MC TCK:
Options: $APPCONFIGOPTS/Merging/DVMergeDST.py;$APPCONFIGOPTS/DaVinci/DataType-2015.py;$APPCONFIGOPTS/Merging/WriteFSR.py;$APPCONFIGOPTS/Merging/MergeFSR.py;$APPCONFIGOPTS/Persistency/Compression-LZMA-4.py;$APPCONFIGOPTS/DaVinci/Simulation.py Options format: Merge Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag: fromPreviousStep
Extra: AppConfig.v3r384 Runtime projects:
Visible: N Usable:Yes
Input file types: B2XMUMU.STRIP.MDST Output file types: B2XMUMU.STRIP.MDST


Inform also: david.gerick@cern.ch

Comments
https://its.cern.ch/jira/browse/LHCBGAUSS-1601
