ID: 54039
Name: RD - Stripping filtered - Sim09f 2018 - MD - B+->K*+mumu
Type: Simulation
State: Done
Priority: 1b
Author: nskidmor WG: RD
Event type:
Number of events:
Starting Date: 2019-04-24
Finalization Date: 2019-05-24
Fast Simulation Type: None
Retention Rate: 0.035

Simulation Conditions: Beam6500GeV-2018-MagDown-Nu1.6-25ns-Pythia8
Beam: beta*~3m, zpv=1.48mm, xAngle=-0.395mrad and yAngle=0 Beam energy: 6500 GeV Generator: Pythia8 G4 settings: specified in sim step
Magnetic field: -1 Detector: 2017, Velo closed around average x=0.846mm and y=0.109mm Luminosity: pp collisions nu = 1.6, 25ns spillover

Processing Pass: Sim09f/Trig0x617d18a4/Reco18/Turbo05-WithTurcal/Stripping34Filtered/Merge14
MC Version: 2018
Step 1 Sim09f - 2018 - MD - Nu1.6 (Lumi 4 at 25ns) - 25ns spillover - Pythia8(138331/Sim09f) : Gauss-v49r12
System config: x86_64-slc6-gcc48-opt MC TCK:
Options: $APPCONFIGOPTS/Gauss/Beam6500GeV-md100-2018-nu1.6.py;$APPCONFIGOPTS/Gauss/EnableSpillover-25ns.py;$APPCONFIGOPTS/Gauss/DataType-2017.py;$APPCONFIGOPTS/Gauss/RICHRandomHits.py;$DECFILESROOT/options/@{eventType}.py;$LBPYTHIA8ROOT/options/Pythia8.py;$APPCONFIGOPTS/Gauss/G4PL_FTFP_BERT_EmNoCuts.py Options format: Multicore: N
DDDB: dddb-20170721-3 Condition DB: sim-20190128-vc-md100 DQTag:
Extra: AppConfig.v3r375;Gen/DecFiles.v30r29 Runtime projects:
Visible: Y Usable:Yes
Input file types: Output file types: SIM

Step 2 Digi14c for 2015 - 25ns spillover(137780/Digi14c) : Boole-v30r4
System config: x86_64-slc6-gcc49-opt MC TCK:
Options: $APPCONFIGOPTS/Boole/Default.py;$APPCONFIGOPTS/Boole/EnableSpillover.py;$APPCONFIGOPTS/Boole/DataType-2015.py;$APPCONFIGOPTS/Boole/Boole-SetOdinRndTrigger.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r374 Runtime projects:
Visible: N Usable:Yes
Input file types: SIM Output file types: DIGI

Step 3 L0 emulation for 2018 - TCK 0x18a4 - DIGI(138052/L0Trig0x18a4) : Moore-v28r3p1
System config: x86_64-slc6-gcc62-opt MC TCK:
Options: $APPCONFIGOPTS/L0App/L0AppSimProduction.py;$APPCONFIGOPTS/L0App/L0AppTCK-0x18a4.py;$APPCONFIGOPTS/L0App/ForceLUTVersionV8.py;$APPCONFIGOPTS/L0App/DataType-2017.py Options format: l0app Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r374 Runtime projects:
Visible: N Usable:Yes
Input file types: DIGI Output file types: DIGI

Step 4 TCK-0x517a18a4 (HLT1) Flagged for 2018 - DIGI(137782/Trig0x517a18a4) : Moore-v28r3p1
System config: x86_64-slc6-gcc62-opt MC TCK:
Options: $APPCONFIGOPTS/Moore/MooreSimProductionForSeparateL0AppStep2015.py;$APPCONFIGOPTS/Conditions/TCK-0x517a18a4.py;$APPCONFIGOPTS/Moore/DataType-2017.py;$APPCONFIGOPTS/Moore/MooreSimProductionHlt1.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r374 Runtime projects:
Visible: N Usable:Yes
Input file types: DIGI Output file types: DIGI

Step 5 TCK-0x0x617d18a4 (HLT2) Flagged for 2018 - DIGI(137783/Trig0x617d18a4) : Moore-v28r3p1
System config: x86_64-slc6-gcc62-opt MC TCK:
Options: $APPCONFIGOPTS/Moore/MooreSimProductionForSeparateL0AppStep2015.py;$APPCONFIGOPTS/Conditions/TCK-0x617d18a4.py;$APPCONFIGOPTS/Moore/DataType-2017.py;$APPCONFIGOPTS/Moore/MooreSimProductionHlt2.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r374 Runtime projects:
Visible: Y Usable:Yes
Input file types: DIGI Output file types: DIGI

Step 6 Reco18 for MC 2018 - DST(138325/Reco18) : Brunel-v54r1
System config: x86_64-slc6-gcc62-opt MC TCK:
Options: $APPCONFIGOPTS/Brunel/DataType-2018.py;$APPCONFIGOPTS/Brunel/MC-WithTruth.py;$APPCONFIGOPTS/Brunel/SplitRawEventOutput.4.3.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r374;Det/SQLDDDB.v7r10 Runtime projects:
Visible: Y Usable:Yes
Input file types: DIGI Output file types: DST

Step 7 Turbo lines (MC) including TurCal, Turbo 2018 - uDST(137696/Turbo05-WithTurcal) : DaVinci-v44r7
System config: MC TCK:
Options: $APPCONFIGOPTS/Turbo/Tesla_2018_LinesFromStreamsAndTurCal_MC.py;$APPCONFIGOPTS/Turbo/Tesla_Simulation_2018.py;$APPCONFIGOPTS/Turbo/Tesla_FilterMC.py Options format: Tesla Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r374;TurboStreamProd.v4r2p10 Runtime projects:
Visible: Y Usable:Yes
Input file types: DST Output file types: DST

Step 8 Stripping34Filtered mDST for RDWG (B+->K*mumu) - Sim09(138188/Stripping34Filtered) : DaVinci-v44r7
System config: x86_64-slc6-gcc62-opt MC TCK:
Options: $RDCONFIGOPTS/FilterB2XMuMu-S34-mdst.py;$APPCONFIGOPTS/DaVinci/DataType-2018.py;APPCONFIGOPTS/DaVinci/InputType-DST.py Options format: Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag:
Extra: AppConfig.v3r378;WG/RDConfig.v1r78 Runtime projects:
Visible: Y Usable:Yes
Input file types: DST Output file types: B2XMUMU.STRIP.MDST

Step 9 Merge for B+->K*+mumu RD Filtered Productions - mDST(138385/Merge14) : DaVinci-v50r2
System config: x86_64-slc6-gcc7-opt MC TCK:
Options: $APPCONFIGOPTS/Merging/DVMergeDST.py;$APPCONFIGOPTS/DaVinci/DataType-2017.py;$APPCONFIGOPTS/Merging/WriteFSR.py;$APPCONFIGOPTS/Merging/MergeFSR.py;$APPCONFIGOPTS/Persistency/Compression-LZMA-4.py;$APPCONFIGOPTS/DaVinci/Simulation.py Options format: Merge Multicore: N
DDDB: fromPreviousStep Condition DB: fromPreviousStep DQTag: fromPreviousStep
Extra: AppConfig.v3r378 Runtime projects:
Visible: Y Usable:Yes
Input file types: B2XMUMU.STRIP.MDST Output file types: B2XMUMU.STRIP.MDST


Inform also: david.gerick@cern.ch

Comments
https://its.cern.ch/jira/browse/LHCBGAUSS-1601
