commit 5f5ca8d11f9a8aebe70128a140ac6be0cfa30d42 Author: Daniel Berninghoff Date: Thu Apr 7 11:18:28 2022 +0200 Initial commit. Final version of thesis as handed in. diff --git a/.gitignore b/.gitignore new file mode 100644 index 0000000..fe889c9 --- /dev/null +++ b/.gitignore @@ -0,0 +1,37 @@ +## Custom +.DS_Store +Material_Dump/ +ThesisVorlagen/ +Templates/ +build/* +!build/main.pdf + +## Core latex/pdflatex auxiliary files: +*.aux +*.lof +*.log +*.lot +*.fls +*.out +*.toc +*.fmt +*.fot +*.cb +*.cb2 +.*.lb + +## Bibliography auxiliary files (bibtex/biblatex/biber): +*.bbl +*.bcf +*.blg +*-blx.aux +*-blx.bib +*.run.xml + +## Build tool auxiliary files: +*.fdb_latexmk +*.synctex +*.synctex(busy) +*.synctex.gz +*.synctex.gz(busy) +*.pdfsync diff --git a/LICENSE b/LICENSE new file mode 100644 index 0000000..b700e15 --- /dev/null +++ b/LICENSE @@ -0,0 +1,21 @@ +MIT License + +Copyright (c) 2020 Daniel + +Permission is hereby granted, free of charge, to any person obtaining a copy +of this software and associated documentation files (the "Software"), to deal +in the Software without restriction, including without limitation the rights +to use, copy, modify, merge, publish, distribute, sublicense, and/or sell +copies of the Software, and to permit persons to whom the Software is +furnished to do so, subject to the following conditions: + +The above copyright notice and this permission notice shall be included in all +copies or substantial portions of the Software. + +THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR +IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, +FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE +AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER +LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, +OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE +SOFTWARE. diff --git a/README.md b/README.md new file mode 100644 index 0000000..a8157eb --- /dev/null +++ b/README.md @@ -0,0 +1,7 @@ +# Dissertation +My PhD Thesis. +The compiled document can be found here: [build/main.pdf](build/main.pdf) + +## Compilation +Using latexmk is recommended: https://ctan.org/pkg/latexmk +Simply run `latexmk` to compile the document. \ No newline at end of file diff --git a/abstract.tex b/abstract.tex new file mode 100644 index 0000000..e9c57ba --- /dev/null +++ b/abstract.tex @@ -0,0 +1,29 @@ +\cleardoublepage +\begingroup +\section*{Abstract} +Between 2019 and 2022, the \lhcbexperiment{} has undergone a major upgrade. +It enables the detector to be operated at an increased luminosity and to be read out at \qty{40}{\mega\hertz} corresponding to the proton bunch crossing rate at the LHC. +In the course of the upgrade, the tracking stations downstream of the magnet have been replaced by a tracker made of scintillating fibres. +With a fibre diameter of \qty{250}{\micro\meter}, silicon photomultiplier readout and custom front-end electronics, it is well suited for the conditions of the next data taking period. + +The front-end electronics of the Scintillating Fibre (SciFi) Tracker follow a modular design and have been optimised for the detector readout at \qty{40}{\mega\hertz}. +Before being installed in the upgraded \lhcbexperiment{}, every component is thoroughly tested as part of a detailed commissioning procedure. +This thesis describes the process of the commissioning and presents the results of a large fraction of the detector. +Along with further performance studies, it could be shown that even on large scales the SciFi front-end electronics meets very high quality standards. + + + + + + +\section*{Kurzfassung} +In den Jahren zwischen 2019 und 2022 wurde das LHCb Experiment einem umfassenden Upgrade unterzogen. +Dieses ermöglicht den Betrieb des Detektors bei erhöhter Luminosität, sowie die Auslesung der Daten bei einer Rate von \qty{40}{\mega\hertz}, was der Protonkollisionsrate am LHC entspricht. +Im Zuge des Upgrades wurden die Hauptspurkammern hinter dem Magneten mit einem neuen Detektor ersetzt, der auf szintillierenden Fasern basiert. +Mit einem Faserdurchmesser von \qty{250}{\micro\meter} und einer Auslese mittels Silizium Photovervielfachern und maßgeschneideter Elektronik ist der Detektor gut für die neuen Bedingungen gerüstet. + +Die Ausleseelektronik des Scintillating Fibre (SciFi) Trackers ist modular aufgebaut und wurde speziell für die Ausleserate von \qty{40}{\mega\hertz} entwickelt. +Vor dem Einbau im LHCb Experiment im Zuge des Upgrades wird jede Komponente in einem detaillierten Inbetriebnahmeverfahren sorgfältig getestet. +Diese Prozedur wird im Rahmen dieser Arbeit besprochen, sowie die Testergebnisse eines Großteils des Detektors vorgestellt. +Zusammen mit weiterführenden Studien konnte gezeigt werden, dass die Ausleseelektronik des SciFi Trackers auch in großen Stückzahlen sehr hohen Qualitätsanforderungen genügt. +\endgroup diff --git a/acknowledgements.tex b/acknowledgements.tex new file mode 100644 index 0000000..2930481 --- /dev/null +++ b/acknowledgements.tex @@ -0,0 +1,25 @@ +\chapter*{Acknowledgements} +Nowadays, scientific research is hardly possible without a strong team effort. +And so also the thesis presented here would not have been possible without the great support of many people, to whom I would like to express my gratitude on the last page. + +First and foremost, this applies to my supervisor \mbox{Prof. Dr. Ulrich Uwer} who gave me the opportunity to join his group and work on an exciting research topic. +During the many years of this thesis, he always gave useful advice and provided constant support and encouragement, which really meant a lot to me. + +Furthermore, I would like to thank \mbox{Prof. Dr. Klaus Reygers} for the interest in my work and for reviewing this dissertation, as well as \mbox{Prof. Dr. Tilman Plehn} and \mbox{Prof. Dr. Ulrich A. Glasmacher} for completing the examination committee. + +This thesis has been carried out in the context of the LHCb \scifitracker{}, which involves people from more than a dozen institutes actively working together on the project. +For this reason I would like to express my gratitude to all members of the SciFi collaboration who directly or indirectly contributed to this work. + +A special word of thanks goes to Xiaoxue Han from whom I have learned a lot over the last years of tightly working together. +I could always count on her support and would hereby also like to offer my appreciation for proofreading parts of this thesis. + +In addition, I would like to thank my colleagues from the SciFi electronics team -- +in particular Magali Magne, Wilco Vink, Maurício Féo, José Mazorra de Cos, Olivier Le Dortz, André Massafferri and Diogo Ayres Rocha for a close collaboration on various topics throughout this work. +Special thanks goes to Lukas Witola with whom I worked closely together during the commissioning and who has gradually taken over many of my responsibilities. +In the context of the commissioning, I would also like to express my gratitude to the LHCb Online group for providing extensive support in the areas of the DAQ system and the network infrastructure. + +I would like to thank the entire Heidelberg LHCb group for a great working environment and the nice get-togethers for coffee and cake. +Thanks to my (former) Heidelberg SciFi colleagues Blake Leverington, Sebastian Bachmann, Albert Comerma, Michał Dziewiecki and David Gerick for fruitful discussions in our hardware meetings in earlier phases of the project. + +And last but not least, I would like to thank my family and friends for their continuous support and for always believing in me. +Without having them at my back, this thesis would not have been possible. diff --git a/build/main.pdf b/build/main.pdf new file mode 100644 index 0000000..0acc9f7 Binary files /dev/null and b/build/main.pdf differ diff --git a/commissioning.tex b/commissioning.tex new file mode 100644 index 0000000..6abdee2 --- /dev/null +++ b/commissioning.tex @@ -0,0 +1,1652 @@ +\chapter{Commissioning of the SciFi Front-End Electronics} +\label{ch:commissioning} + +The commissioning of the SciFi front-end electronics is performed along with the assembly and testing of the \cframes{} (see \cref{sec:c-frames}). +It began in 2019 and, after multiple interruptions in the course of the \mbox{COVID-19} pandemic, is planned to be concluded by spring 2022. +The assembly takes place in building 3852 at CERN LHC Point 8, which is the site housing the LHCb experiment and its infrastructure. +The location of the building, in the following referred to as (SciFi) assembly hall, is shown on the satellite image of the site in \vref{fig:point8}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Point8} + \caption{ + Location of the SciFi assembly hall, highlighted in blue, at CERN LHC Point 8. + The orange path indicates the transport route of the fully assembled and commissioned \cframes{} to the access shaft in order to be lowered into the LHCb cavern. + The street art on the left shows a projection of the LHCb experiment located \qty{100}{\meter} underground. + Satellite image taken and modified from Ref.~\autocite{mapcern} + } + \label{fig:point8} +\end{figure} + +The assembly and commissioning of the individual \cframes{} requires a close collaboration of physicists, engineers and technicians from different institutes. +From start to finish, the process for an individual \cframe{} takes about four months and consists of the following steps: +% Steps taken from https://social.cern.ch/me/bleverin/Documents/Shared%20with%20Everyone/SciFi/C-Frames_GPshort.pdf +\begin{itemize} + \setlength\itemsep{0em} + \item Assembly of the C-shaped mechanical support frame. + \item Installation of water cooling pipes and blocks. + \item Low and high voltage cables installation and testing. + \item Installation of Novec and dry gas lines. + \item Laying of optical fibres. + \item Mounting of fibre modules. + \item Connection of cold boxes to dry gas and Novec bellows. + \item Winding of heating wires around the cold boxes. + \item Test of vacuum and Novec cooling system. + \item Mounting of Readout Boxes (ROBs). + \item Connection of power and SiPM flex cables to the ROBs. + \item Inspecting, cleaning, and connecting optical fibres to the ROBs. + \item \textbf{Commissioning of ROBs.} +\end{itemize} +Many of the steps can be performed in parallel on up to four \cframes{}. +This is possible by four separate assembly and commissioning slots inside the SciFi assembly hall as shown in \vref{fig:assembly-hall}. +Each slot, also referred to as C-Cage, is surrounded by a scaffolding that allows work to be conducted on three different levels. +However, the available infrastructure only allows for the commissioning of one \cframe{} at a time. +Due to limited lengths of cables and supply lines it is performed in the two leftmost slots depicted in \cref{fig:assembly-hall}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Assembly_Hall} + \caption{ + Photograph of the four \cframe{} assembly and commissioning slots inside the SciFi assembly hall at night. + } + \label{fig:assembly-hall} +\end{figure} + +Six further \cframes{} can be stored in a dedicated storage cage. +Because it is also used for transporting the detector elements to the LHCb cavern (see route in \vref{fig:point8}) it is referred to as transport and storage cage (TS-Cage). +In addition, the TS-Cage allows for flexibly swapping \cframes{} between the different slots. +This is for instance required for moving an assembled \cframe{} to one of the two commissioning slots. + + +\section{Complexity of Readout System} +\label{sec:complexity} +Due to the complexity of the system, the operation of the SciFi front-end electronics is challenging. +As illustrated in \vref{fig:complexity}, the complete detector consists of many thousand individual components that are installed in a total of \num{256} ROBs. +These include the Master, Cluster and PACIFIC Boards, as well as the various ASICs, FPGAs and other electronic parts that are located on these boards. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Complexity} + \caption{ + Illustration of the complexity of the SciFi front-end electronics. + The given values correspond to the number of components installed in the complete detector. + } + \label{fig:complexity} +\end{figure} + +The task of the electronics commissioning is the initial operation of this system in conjunction with the surrounding infrastructure and the DAQ system. +As mentioned previously, this is performed at the level of individual \cframes{}, i.e. in units of 1/12 of the complete detector. +Thereby, it must be ensured that all components are functioning properly and, if not, that the necessary calibration and tuning measures are carried out. + +In the scope of this thesis, a detailed commissioning procedure has been defined, developed and implemented. +In a series of tests, the correct functioning of the front-end electronics is ensured. +In addition, the electronics properties are validated at the system level while being installed on the \cframes{}. +The complete commissioning procedure is presented in \cref{sec:commissioning-procedure} along with the discussion of the results throughout the course of this chapter. +A key aspect of it is the verification of a stable data transmission over the total of 4096 data links. +Establishing the \qty{40}{\mega\hertz} readout required for that purpose was a major part in the framework of this work. + + +\section{Front-End Tester} +\label{sec:fe-tester} +Before being mounted on a \cframe{}, the proper functioning of each individual ROB is verified by a dedicated test stand located in an electronics lab on the LHCb site. +The so-called SciFi Front-End Tester (FE-Tester) comprises a signal injection system that was specifically designed for the project. +A FE-Tester with a mounted ROB is shown in the photograph in \vref{fig:fe-tester}, along with a schematic drawing of the complete setup. +The FE-Tester itself consists of one control board and eight injector modules with \num{256} channels each in order to cover the \num{2048} channels of one ROB under testing. +Two of these systems are in operation for the quality control of the SciFi front-end electronics~\autocite{fe-tester}. + +\begin{figure} + \captionsetup[subfigure]{aboveskip=1pt, belowskip=12pt} %Tune space between captions and subfigures + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/FE-Tester} + \end{subfigure} + \hfill + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/FE-Tester_Drawing} + \end{subfigure} + \caption{ + Photograph of the SciFi Front-End Tester with a mounted ROB under testing (left). + A schematic drawing of the complete setup including the DAQ system and power supplies is shown on the right. + Two of these test systems are used to verify the proper functioning of the ROBs before being installed on the \cframes{}. + } + \label{fig:fe-tester} +\end{figure} + +The connection to the DAQ server is established via a bidirectional optical link. +Like the \MB{}, the control board features a Master GBTX (see \cref{sec:master-gbtx}) and SCA (\cref{sec:master-sca}) to enable the communication. +It shares the same back-end electronics as the ROB under testing, as well as an extended version of the control software used in the commissioning, which has been contributed as part of this thesis. +Further details about the DAQ system and software are given in the following sections. + +The main functionality of the FE-Tester is the injection of calibrated charge pulses into the \num{2048} PACIFIC channels of the examined ROB. +It is thus possible to verify the functioning of each channel by comparing the detected signal amplitude with the expected value, as well as evaluating the noise level. +In addition, the FE-Tester allows for the independent charge injection into selected channels, thereby enabling the detection of short-circuited channels. +The connection to the PACIFIC channels is established via the same 80-pins, \qty{0.5}{\milli\meter} pitch connectors used for connecting the SiPM arrays (see \cref{sec:sipm}). +However, defects of these high density connectors are to be expected after about \num{50} mating cycles. +Therefore, an interconnected adapter board (connector saver) is utilised to allow for the testing of the larger number of ROBs. + +Besides from the main test sequence involving the charge injection from the FE-Tester, each ROB is subject to a series of further checks while being mounted on the test stand. +These include the reading of hardware IDs of the individual components like GBTX and SCA ASICs. +By comparing them with the expected values as stored in a database during the assembly of the ROB, it is assured that only intended boards and components are used. +Furthermore, the ROBs are prepared for the following commissioning on the C-Frame by programming the FPGAs with later firmware versions, while also testing the programming functionality itself. +The commissioning preparations also include a (pre-)calibration of the temperature and voltage monitoring circuits. +Further details can be found in \cref{sec:temperatures,sec:hv-calibration}. + +After a ROB passed the complete test procedure, it undergoes an optical inspection and cleaning of the VTRx and VTTx modules before being cleared for the commissioning. +\Vref{fig:robs-on-cframe} shows a photograph of six ROBs that have been mounted on a \cframe{} after passing the tests on the FE-Tester. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/ROBs_on_Cframe} + \caption{ + Photograph of six ROBs mounted on the bottom half of a \cframe{} and ready to be commissioned. + } + \label{fig:robs-on-cframe} +\end{figure} + + +\section{Commissioning Setup} +\label{sec:commissioning-setup} + +As discussed previously, the commissioning of the SciFi front-end electronics is performed directly following the assembly of each \cframe{}. +It is carried out in one of two available commissioning slots in the back part of the SciFi assembly hall, close to the infrastructure needed for that purpose. + +Depending on the tracking station, each \cframe{} comprises up to \num{24} ROBs that are commissioned at once\footnote{Some commissioning steps cannot be done in parallel for all ROBs, but are performed in two iterations as discussed in the following sections.}. +All the ROBs have been examined using the two FE-Tester setups prior to being mounted. +The aim of the commissioning is to ensure the functionality of the ROBs on the \cframe{} within their final configuration of connected power cables, optical fibres, LIS and SiPMs. +The connection of the SiPM arrays is an especially delicate operation due to the high density connectors. +In the assembly slots, easy access to the different components is provided in case of detected defects during the commissioning. +Afterwards, the \cframes{} are moved to the TS-Cage and transported as a whole to the LHCb cavern, which has been found to be a gentle process in previous (test) transports. + +During the commissioning, the ROBs are already referenced by their location within the final detector. +The location identifier (ID) is composed of the station number $\text{T} = [1,2,3]$, layer within the station $\text{L} = [0,1,2,3]$, quadrant within the layer $\text{Q} = [0,1,2,3]$, and module within the quadrant $\text{M} = [0,1,...,5]$. +Note that the module number only ranges from 0 to 4 for T1 and T2. +The naming convention, as well as the position of an exemplary ROB with location ID T3L2Q3M2, is illustrated in \vref{fig:naming}. +During the commissioning, the location ID of the ROB is often appended with additional information to further localise a component or a problem. +As outlined in \cref{sec:c-frames}, each \cframe{} comprises two layers with two quadrants each. +Thus, it is common to also refer to the \cframes{} in terms of T, L and Q (e.g. T3L23Q13). + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/SciFi_Naming} + \caption{ + Schematic view of the \scifitracker{} with the naming convention overlaid. + An example ROB and its location identifier is highlighted in red. + Distances between the layers (L) and stations (T) are exaggerated for better visibility. + The inner layers per station (L1 \& L2) are tilted by \qty{\pm 5}{\degree} to obtain the $y$-coordinate of detected hits. + } + \label{fig:naming} +\end{figure} + +\subsection{Infrastructure} +\label{sec:commissioning-infrastructure} + +The infrastructure used for the commissioning represents a subset of the final system. +It consists of a MARATON power supply that delivers the low voltage for the front-end boards. +With 12 output channels set to \qty{8}{\volt}, two ROBs are powered by one channel. +The SiPM channels are biased by three CAEN modules of type A1539BP inside a SY4527 crate (see \cref{sec:hv}). +Each of the 96 available HV channels power four neighbouring SiPM arrays corresponding to one fibre mat. +The front-end electronics are cooled by a portable water chiller that provides a water flow of \qty{2.5}{\liter/\minute} at \qty{20}{\celsius} to each quadrant. +A Novec cooling plant is located next to the LV and HV power supplies on the mezzanine floor in the back part of the assembly hall. +During the electronics commissioning of the first \cframes{}, the SiPMs were cooled to \qty{-40}{\celsius}. +However, due to time constraints, the vacuum and Novec cooling tests were separated and performed prior to the electronics commissioning for the later \cframes{}. +A floor plan of the assembly hall including the commissioning setup and infrastructure is shown in \vref{fig:floorplan}. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/commissioning/Assembly_Hall_Floorplan} + \caption{ + Floor plan of the SciFi assembly hall. + } + \label{fig:floorplan} +\end{figure} + + +\subsection{DAQ System} +\label{sec:commissioning-daq} + +The DAQ system used for readout and control of the front-end electronics is located next to the C-Cages. +It comprises a 4U dual processor server\footnote{SuperServer 4029GP-TRT by Super Micro Computer, Inc.} equipped with two \mbox{10-core} Intel Xeon Silver 4114 processors. +The main components are nine PCI Express cards that act as the interface to the front-end electronics. +Since they are specially designed for the trigger-less readout of the LHCb experiment at \qty{40}{\mega\hertz}, they are referred to as PCIe40 cards~\autocite{pcie40}. + +The PCIe40 card embeds a powerful FPGA\footnote{Arria 10 10AX115 by Altera (now Intel Corporation)} with \num{1.15} million logic cells. +Its purpose is to enable the flexible implementation of the GBT architecture at the back-end side. +By programming the FPGA with different firmwares, it can fulfil three different roles: +\begin{itemize} + \item The \textbf{TELL40} cards receive the data from the front-end electronics and are responsible for merging events belonging to a single bunch crossing. + \item The \textbf{SOL40s} are the direct interfaces for the communication and control of the front-end boards. + \item The readout supervisor \textbf{SODIN} is responsible for distributing the \qty{40}{\mega\hertz} LHC clock and fast commands to the other cards. +\end{itemize} +Each card supports up to \num{48} bidirectional optical links by means of 4+4 12-channel fibre optics transmitter and receiver modules, called MiniPODs\footnote{MiniPOD AFBR-811FN3Z (Tx) and AFBR-821FN3Z (Rx) by Avago Technologies (now Broadcom Inc.)}. +Eight MPO (Multi-fiber Push On) connectors are located on the board to allow for the connection of the optical fibres going to the front-end electronics. + +\Vref{fig:daq} illustrates the interplay between the SODIN, SOL40 and TELL40 at the back-end, as well as the front-end electronics. +For the SciFi commissioning, eight PCIe40 cards are configured as TELL40s while the remaining one is programmed with a combined SODIN/SOL40 firmware. +The latter distributes the clock and fast commands to the TELL40 cards via SFP+ (enhanced small form-factor pluggable) transceivers and a PON (passive optical network) splitter. + +\begin{figure} + \centering + \includegraphics[width=0.85\textwidth]{figures/commissioning/DAQ} + \caption{ + Interplay of the back- and front-end electronics in the upgraded LHCb DAQ system as used for the commissioning. + During the commissioning, the functionality of the SODIN and SOL40 is combined within a single FPGA. + } + \label{fig:daq} +\end{figure} + +Depending on the tracking station, each \cframe{} comprises up to \num{384} data and \num{48} control links. +Thereby, the available PCIe40 cards are just enough for the commissioning of one \cframe{} at a time. +However, at the time of the commissioning, no TELL40 firmware was available that allowed for the simultaneous operation of all \num{48} links. +Therefore, two separate TELL40 firmwares are in use, each with \num{24} instantiated data links. +The active links are logically split into the lower (quadrants Q0/Q1) and upper (Q2/Q3) half of the \cframe{}. +As a result, the commissioning steps that require the data taking capabilities need to be performed separately for both halves. +Conversely, all ROBs on the \cframe{} can be controlled with a single SODIN/SOL40 firmware. + +In general, the firmwares for the PCIe40 cards were still experimental and under heavy development especially in the early phase of the commissioning. +Therefore, the debugging of the DAQ system was conducted in parallel and several attempts were required in order to obtain a (mostly) stable system. +Once a set of functioning firmwares were found, their versions were kept and used throughout the complete commissioning campaign. +As a consequence, not the full feature set was available and some workarounds were required in order to achieve the desired results. +For compatibility reasons, this also includes the firmwares of the Housekeeping and Cluster FPGAs on the front-end electronics itself. + + +\subsection{Control Software} +The software to control the SciFi front- and back-end electronics has been developed within the SCADA (Supervisory Control and Data Acquisition) system SIMATIC \winccoa{}~\autocite{wincc-oa}. +A \winccoa{} system, also referred to as project, follows a distributed architecture consisting of multiple autonomous processes that are called managers. +These can be control managers that are executing program code written in the \winccoa{} CTRL language whose syntax shows strong similarities with that of the C programming language. +In addition to that, an API (Application Programming Interface) exists that allows to execute external \CC{} programs in the context of the project. +Other examples are user interface managers that are responsible for the visual representation of control panels and the handling of user input. +Screenshots of \winccoa{} control panels can be found in the following sections. + +\begin{figure} + \centering + \includegraphics[width=0.7\textwidth]{figures/commissioning/WinCC-OA} + \caption{ + Structure of a \winccoa{} project. + Image taken from Ref.~\autocite{wincc-clara}. + } + \label{fig:wincc-oa} +\end{figure} + +The typical structure of a \winccoa{} project is depicted in \vref{fig:wincc-oa}. +While multiple control (Ctrl) and user interface managers (UIM) can be present, a single event manager (EVM) forms the core of the project. +Via an intermediate database manager (DBM), it has access to the project's database (DB). +All communication between the various processes, including the drivers (D) that establish the connection to the physical devices, goes through the event manager and the interaction with the database. +The objects stored in the database are called datapoints and can follow different structures. +These are defined by the datapoint types that can be thought of as (nested) structs within the C programming language and its derivatives. +Typically, physical devices like the \MB{} with its components are represented as datapoint types. + +Besides from the inherent distributed architecture, it is even possible to connect different \winccoa{} projects with each other. +This is enabled by the distribution managers in each project that allow for the combination of hundreds of systems. +Due to its good scalability, \winccoa{} is used for controlling all LHC experiments at CERN~\autocite{lhcb-scada}. +However, \winccoa{} can not be understood as a ready-to-use control system, but it rather provides the underlying tools to built such a system depending on the individual needs. + +\subsubsection{JCOP Framework} +For that reason, a joint controls project (JCOP) was initiated by the four LHC experiments~\autocite{jcop}. +Due to similar requirements, it aims at avoiding the duplication of work during the development of new control systems. +In addition to including a set of packages with common control solutions, it also provides a framework that allows for the creation and distribution of further JCOP components. + +Two of these additional packages are the fwGbt and fwHw components~\autocite{lhcb-scada}. +The fwGbt component integrates the GBT architecture into \winccoa{} by providing an interface to the various protocols that the GBT chipset supports (see \cref{sec:cluster-sca,sec:master-gbtx}). +It is used in close conjunction with the GbtServ that performs the low-level communication with the PCIe40 cards and their firmwares. +As such, it forms the bridge between the control system and the hardware level. +The fwHw component is designed to model the structure of the front-end electronics in a user-friendly way by hiding the complexity of the underlying \winccoa{} datapoint structures. +Combined, the fwGbt and fwHw packages allow for the interaction with the different hardware devices without the need to specify parameters like the protocol or address, as these are already defined in the model. + +On a macroscopic level, the devices are organised in a hierarchical structure. +The tree-like structure consists of interconnected nodes, where each node contains one or multiple children. +On the lowest level, representing the leafs of the tree, there are the physical devices. +Conversely, the nodes describe logical accumulations of the actual hardware. + +\subsubsection{Finite State Machine (FSM)} +The creation of the hierarchical structure is enabled by the fwFSM component provided in the JCOP framework~\autocite{jcop}. +Within the implementation of the package, a node is referred to as control unit (CU) and a leaf as device unit (DU). +The naming is inspired by the term FSM (Finite State Machine), since each unit (CU or DU) is assigned a fixed number of states. +Transitions between the different states are possible by issuing a command to the unit, while the set of available commands depends on the current state. +Since a CU is not a physical device in itself but a logical accumulation, its state depends on the combined states of its children. +As a result, when any child is in an erroneous state, the parent CU is in an erroneous state as well. +In turn, issuing a command to a CU results in it being forward to its child units. +Summarising the above, it can be said that state changes are propagated up the hierarchy (from leaves to the root of the tree) while commands are moving down the hierarchy (root to leaves). +For the operator, this allows for a clear overview when controlling and monitoring the detector. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/FSM_Tree} + \caption{ + Hierarchical structure the SciFi front-end electronics (FEE) as implemented in the control software. + It is usually referred to as FSM tree. + Image inspired from Ref.~\autocite{scifi-controls}. + } + \label{fig:fsm-tree} +\end{figure} + +The so-called FSM tree of the SciFi front-end electronics as implemented in the control software is displayed in \vref{fig:fsm-tree}. +As can be seen, the hierarchy is strongly oriented towards the naming convention of the ROBs introduced in \cref{sec:commissioning-setup}. +Hence, the tracking stations, layers, quadrants and modules each form a new layer of CUs. +On the lowest level are the \HalfROBs{} that represent the DUs in the tree. +Since each \HalfROB{} is controlled by a separate (bidirectional) control link, it is the logical choice for the smallest unit within the hierarchy. +\Vref{fig:den} shows a screenshot of the Device Editor Navigator (DEN) that is used in \winccoa{} to create the tree-like structure. + +\begin{figure} + \centering + \begin{minipage}{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/commissioning/DEN} + \caption{Screenshot of the device manager used to create and control the hierarchical structure of the SciFi front-end electronics.} + \label{fig:den} + \end{minipage} + \hfill + \begin{minipage}{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/commissioning/FSM} + \caption{ + Finite State Machine (FSM) inside the device unit (DU) of the SciFi front-end electronics project. + Each DU is representing one \HalfROB{}. + } + \label{fig:fsm} + \end{minipage} +\end{figure} + +The possible states and transitions within the FSM of the \HalfROBs{} are illustrated in \vref{fig:fsm}. +On start-up, issuing a Reset command brings the DU into the NOT\_READY state in which all the components on the front-end boards are powered. +However, a subsequent Configure command is required to get the \HalfROB{} READY for taking data. +During a data taking run, the DUs are in the RUNNING state. +Any failures during the execution of the different commands result in the transition to ERROR from any of these states. +Further details about the different states and commands are given in the following sections. + +Based on the aforementioned building blocks, the control system for the \cframe{} commissioning has been implemented. +Two \winccoa{} projects are running on the DAQ server itself and are responsible for the control of the SciFi front- and back-end electronics. +Additional projects are installed on supplementary machines in order to regulate the devices providing the infrastructure (see \cref{sec:commissioning-infrastructure}). +The different projects are integrated into the LHCb network and connected to each other via their distribution managers. +Although the system has been developed with the \cframe{} commissioning in mind, it also forms the basis for the control system used for the final operation of the detector in the LHCb cavern. + + + +\subsection{Commissioning Procedure} +\label{sec:commissioning-procedure} +The procedure of the SciFi front-end electronics commissioning consists of a number of successive steps. +In order to ensure the correct functioning of the ROBs, the test sequence is split into three stages as displayed in \vref{fig:commissioning-procedure}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Procedure} + \caption{ + Test sequence during the SciFi front-end electronics commissioning. + } + \label{fig:commissioning-procedure} +\end{figure} + +In the first stage, the electronics are tested for their basic functionality. +This includes, among other things, checking the communication to the Master GBTX ASICs via the bidirectional optical links, as well as testing the internal communication protocols and registers while configuring the various components within each ROB. + +The second stage is about the examination of the readings of the temperature and voltage sensors located on the front-end boards. +In case of the HV biasing the SiPM arrays, this includes a recalibration of the monitoring circuit parameters. + +The third and last stage consists of extensive tests that involve the data taking functionalities through the complete data chain. +These range from injecting test patterns to recording SiPM signals generated by the LIS (see \cref{sec:lis}). +Given the limitation of the available DAQ system and TELL40 firmwares that only allow to readout half of the data links (see \cref{sec:commissioning-daq}), these steps need to be performed twice for each \cframe{}. + +The complete procedure takes about two working weeks per \cframe{}, or longer if defects are found that require a rework or even a replacement of ROBs. +However, due to the initial development of tools and the varying situations within the \mbox{COVID-19} pandemic, the commissioning of the first four \cframes{} took significantly more time. +Within the scope of this thesis, the test procedure was developed and implemented in software. +After overcoming initial challenges and performing the measurements on the first \cframes{}, the responsibilities for the further conduction of the different test steps were gradually transferred to other members of the SciFi collaboration. + +A list of all \cframes{} and the time periods in which they were commissioned is shown in \vref{tab:commissioning}. +They are numbered on both sides of the beam pipe from station T3 to T1. +Depending on the state of the assembly, the order of commissioning roughly followed this numbering. +The six \cframes{} facing the cryogenic facility (C-side) were commissioned at first in order to be installed in the LHCb cavern prior to the beam pipe. +Afterwards, the six \cframes{} towards the access point (A-side) followed. + +The different test steps are fully described in the following sections, along with the results of the 9 out of 12 \cframes{} that were fully commissioned at the time of writing. + +\begin{table} + \centering + \begin{threeparttable} + \caption{Time periods in which the commissioning of the front-end electronics for the 12 \cframes{} forming the \scifitracker{} took place.} + \label{tab:commissioning} + \begin{tabular}{@{}llllll@{}} + \toprule + % Header + \multirow{2}{*}{\bfseries C-Frame} & + \multirow{2}{*}{\bfseries Side} & + \multirow{2}{*}{\bfseries Location ID} & + \multirow{2}{*}{\bfseries ROBs} & + \multicolumn{2}{c}{\bfseries Commissioning}\\ &&&& Started & Completed \\ \midrule + %--------- + C-Frame 1 & C & T3L23Q02 & 24 & 25.11.2019 & 24.02.2020 \\ + C-Frame 2 & C & T3L01Q02 & 24 & 06.11.2020 & 10.02.2021 \\ + C-Frame 3 & C & T2L23Q02 & 20 & 28.02.2020 & 21.07.2020 \\ + C-Frame 4 & C & T2L01Q02 & 20 & 04.08.2020 & 02.11.2020 \\ + C-Frame 5 & C & T1L23Q02 & 20 & 28.05.2021 & 08.06.2021 \\ + C-Frame 6 & C & T1L01Q02 & 20 & 16.06.2021 & 01.07.2021 \\ + C-Frame 7 & A & T3L23Q13 & 24 & 13.10.2021 & 28.10.2021 \\ + C-Frame 8 & A & T3L01Q13 & 24 & 23.09.2021 & 06.10.2021 \\ + C-Frame 9 & A & T2L23Q13 & 20 & 03.11.2021 & 18.11.2021 \\ + C-Frame 10 & A & T2L01Q13 & 20 & \multicolumn{2}{c}{Q1 2022*} \\ + C-Frame 11 & A & T1L23Q13 & 20 & \multicolumn{2}{c}{Q1 2022*} \\ + C-Frame 12 & A & T1L01Q13 & 20 & \multicolumn{2}{c}{Q1 2022*} \\ \bottomrule + \end{tabular} + \begin{tablenotes}[flushleft] + \small + \item * Expected + \end{tablenotes} + \end{threeparttable} +\end{table} + +\section{Communication to Master GBTXs} +\label{sec:master-gbtx-communication} +The first step after powering up the ROBs by the MARATON power supply is to check the communication between the front- and back-end electronics via the bidirectional optical links. +As outlined in \cref{sec:master-gbtx}, the Master GBTX recovers the clock from the incoming data stream and replies in turn with GBT frames consisting of 120 bits each. +As depicted in \vref{fig:gbt_dataformat}, a 4-bit header marks the beginning of each frame and is required for synchronisation on the receiving side. +Once the header is recognised \num{15} times in a row, the data stream is considered as locked. +Conversely, missing the header more than \num{4} times without detecting \num{8} consecutive valid headers in-between results in a loss of the acquired frame-lock. + +%== Values read from a Master GBTX on the C-Frame == +%rxValidHeaders=15 +%rxMaxInvalidHeaders=4 +%rxMinValidHeaders=8 + +For each link of the SOL40 card, there is a register that contains the counted number of clock cycles without frame-lock. +When stable connections to the Master GBTX ASICs exists, after powering up the ROBs and resetting the counters, the values should stay at zero. +For that purpose, the counters of the 48 SOL40 links are monitored in a dedicated \winccoa{} control panel. + +During the commissioning of the first 9 \cframes{}, corresponding to \num{392} \HalfROBs{}, it occurred only once that the connection to a Master GBTX could not be established. +As a consequence, the affected ROB T3L3Q3M4 on \cframe{} 7 was replaced with a spare in order to get repaired. + + +\section{Configurability of ROBs} +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/HalfROB_Panel} + \caption{ + \winccoa{} control panel showing the readout values of the main registers of one \HalfROB{}. + Intended for the use by experts for debugging purposes. + } + \label{fig:halfrob-panel} +\end{figure} + +After verifying the connection to the Master GBTXs, the next step is to test the internal communication protocols and control registers of the various components inside the ROBs. +Theses tests are carried out in the process of fully configuring the boards such that they are ready for data taking. +As depicted in \vref{fig:fsm}, after powering the \HalfROBs{}, getting them to the READY state requires a Reset followed by a Configure command. +The constituent actions of these two FSM commands are presented in the following. + +\subsubsection{Reset Command} +The Reset command can be considered as the minimal set of actions that are required to provide power to all components of the ROB. +As shown in \cref{fig:fsm}, it can be issued from any state and is used to put the electronics in a well-defined state. +The complete procedure consists of the following consecutive steps: +\begin{enumerate} + %==Master Board== + \item[] \textbf{Reset \MB{} (MB)} + \begin{enumerate}[label=\arabic*.] + %\item Check Master GBTX lock + \item Configure the Master GBTX (366 read/write control registers) to set up the E-Links and the Data GBTX reference clocks (see \cref{sec:master-gbtx}) + \item Reset the Master SCA, enable the required control buses and configure directions of the GPIO pins (see \cref{sec:cluster-sca,sec:master-sca}) + \item Provide power to all components by successively enabling the three \DCDC{} converter sections through the corresponding GPIO output lines (see \cref{sec:master-sca}) + \begin{enumerate}[label=\alph*)] + \item Left half of the MB including CB0, CB1 and PB0, PB1, as well as the HK FPGA + \item Right half of the MB including CB2, CB3 and PB2, PB3 + \item Cluster FPGAs on all four CBs + \end{enumerate} + \item Reset and configure the Data GBTXs (366 read/write control registers) to provide the external clocks to the Cluster FPGAs and PACIFICs (see \cref{sec:data-gbtx}) + \end{enumerate} + %==Cluster Boards== + \item[] \textbf{Reset \CB{}s (CBs)} + \begin{enumerate}[label=\arabic*.] + \item Reset the Cluster SCAs, enable the required control buses and configure directions of the GPIO pins (see \cref{sec:cluster-sca}) + \item Perform device resets of the Cluster FPGAs through the corresponding GPIO output lines (see \cref{sec:cluster-sca,sec:cluster-fpga}) + \end{enumerate} + %==PACIFIC Boards== + \item[] \textbf{Reset \PB{}s (PBs)} + \begin{enumerate}[label=\arabic*.] + \item Reset the four PACIFICs on each PB (see \cref{sec:pacific_regs}) + \begin{enumerate}[label=\alph*)] + \item Perform a global digital reset (GPIO output signal: RESET) + \item Load the initial register values (GPIO output signal: LDINIT) + \end{enumerate} + \end{enumerate} +\end{enumerate} +Each operation is verified by reading back the values from the corresponding control registers. +Only if they are matching the previously written values, the procedure continues with the next step. +In case of a mismatch, an error message is raised and the \HalfROB{} DU changes to the ERROR state. +Otherwise, once all steps have been completed successfully, the FSM state of the DU switches to NOT\_READY. + +Due to the implementation of the E-Links, all four Cluster and PACIFIC Boards can be handled in parallel. +The control software has been developed with that functionality in mind and is addressing all boards simultaneously wherever possible. +Similarly, on the level of the FSM tree, issuing a command to a CU will be forwarded and processed concurrently by the DUs below. +In principle, this allows to reset all \HalfROBs{} on a \cframe{} in the same time as an individual one. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Reset_Procedure} + \caption{ + Time course of the input voltage and current consumption of one \HalfROB{} during the processing of the Reset command as measured with an oscilloscope. + The slight changes in the input voltage are due to voltage drops in the power cable itself. + } + \label{fig:reset-procedure} +\end{figure} + +\Vref{fig:reset-procedure} shows the change of the current consumption and input voltage of one \HalfROB{} during the Reset procedure as measured with an oscilloscope, starting from powering the left half. +As can be seen, the complete process takes in the order of a few seconds. +The largest increases in the power consumption are related to enabling the three \DCDC{} converter sections in the beginning, as well as the configuration of the Data GBTXs. +The measurement was performed within the commissioning setup as described in \cref{sec:commissioning-setup}. +Hence, the probed \HalfROB{} was powered by a MARATON channel operating at \qty{8}{\volt}. +The slight reduction in the input voltage results from increasing voltage drops in the \qty{30}{\meter} LV cable going from the power supply to the \cframe{}. + +During the commissioning of the first \cframe{}, stability issues were encountered that even led to communication losses to the \HalfROBs{} in some cases when issuing the Reset command. +It was traced back to be caused by drops of the input voltage that could fall below the level of \qty{6.5}{\volt}, which is required for the operation of the FEASTMP \DCDC{} converters. +It was found that an additional capacitance is required to stabilise the input voltage and also to suppress ringing. +Therefore, specially designed \qty{10}{\milli\farad} capacitor boards consisting of multiple radiation hard ceramic capacitors were produced~\autocite{capacitor-boards}. +They are connected to each LV splitter on the \cframes{} that distribute the power from one MARATON channel to four neighbouring \HalfROBs{}. +Like this, the voltage drops during the Reset procedure are reduced and the input voltage is kept above the limit of \qty{6.5}{\volt} as shown in \cref{fig:reset-procedure}. + +\subsubsection{Configure Command} +As depicted in \cref{fig:fsm}, the Configure command can be issued to DUs within the NOT\_READY state in which they are found after a successful Reset. +The purpose of it is to prepare the front-end electronics with the proper configuration parameters needed for taking high quality data. +In contrast to the Reset command that performs the same actions and writes the identical values to the control registers of all \HalfROBs{}, settings individual for each \HalfROB{} are loaded during the Configure command. +The values are determined during the production QA tests of the individual components and saved in the SciFi production database (see \cref{sec:qa}). + +This applies to the parameters $I_\text{bias}$ and $I_\text{mod}$ of the LIS, as well as the \PB{}s. +After the QA procedure, a configuration file is uploaded to the database for every \PB{}. +Each file contains the operational values of the \num{336} read/write control registers of each of the four assembled PACIFIC ASICs. +At this stage, the reference voltage parameters $V_\text{REF}$ and $V_\text{refDCFB}$, as well as the trim DACs are specific to each chip, while the remaining values are common to all. +During the Configure command, the configurations are parsed from the files and applied to the devices. + +Besides from the control register values, a \PB{} configuration file also contains the serial number of the board. +Before applying the configuration, the serial number is read from the board and compared to the value from the file. +This is particularly important in the commissioning as it allows to verify that the optical control links are connected to the intended \HalfROBs{}. +To confirm the mapping of the data links, an additional step is required that includes the start of a data taking run. +In preparation for this, the 10-bit location ID of the \HalfROB{} is written to a register of the HK FPGA during the configuration. +Further details are given in \cref{sec:fibre-mapping}. + +In the last step of the Configure command, the Master and Cluster SCAs are prepared for the monitoring of the temperatures and voltages. +This includes the activation of the ADCs, as well as the switchable \qty{100}{\micro\ampere} current sources required for the operation of resistance thermometers. + +Completing all steps of the Configure command successfully results in the \HalfROB{} to change to the READY state, otherwise it goes to ERROR. +During the commissioning of the first 9 \cframes{}, the configuration of a single \HalfROB{} failed because the communication to the LIS GBLDs could not be established. +The issue could only be solved by replacing the affected ROB T2L3Q3M0 on \cframe{} 9 with a spare. + +\section{Optical Fibre Mapping} +\label{sec:fibre-mapping} +While the correct cabling of the control links is confirmed in the previous commissioning step when configuring the \HalfROBs{}, further actions are required to verify the mapping of the data links. +The process is based on sending a unique identifier (ID) on each link to the TELL40 cards. +The structure of the so-called (data) link ID consisting of 13 bits is illustrated in \vref{fig:link-id}. +It comprises the 10-bit \HalfROB{} location ID followed by a 3-bit identifier to describe the data link within the \HalfROB{}. + +\begin{figure} + \centering + \includegraphics[width=0.8\textwidth]{figures/commissioning/LinkID} + \caption{ + Structure of the 13-bit link ID used to uniquely identify the \num{4096} data links of the \scifitracker{}. + } + \label{fig:link-id} +\end{figure} + +As shown in \vref{fig:fee-datapath}, there are eight data links per \HalfROB{}, each one corresponding to one Data GBTX and Cluster FPGA. +The 13-bit link ID is constructed in the Cluster FPGA based on the input from 13 individual pins. +The 10-bit location ID of the \HalfROB{} is routed from the HK FPGA to all Cluster FPGAs. +Its value is determined by the content of the HK FPGA instruction register that is assigned with the correct ID during the configuration of the \HalfROB{}. +The remaining 3 bits are composed as follows: +Each FMC connector between the Master and Cluster Boards has two dedicated pins that are connected individually to ground or \qty{1.5}{\volt} on the \MB{}, thereby encoding the location of the \CB{} within the \HalfROB{}. +As already introduced in \cref{sec:cluster-fpga}, the same principle is applied on the \CB{}s themselves to determine the position of the Cluster FPGA on the board. + +In order to transfer the information to the TELL40s, a data taking run has to be initiated. +However, in the general data format shown in \vref{tab:dataformat-ff}, there is not enough bandwidth available for the additional transmission of the 13-bit link ID. +Instead, the information is embedded into special GBT frames that are leading every run. +The original purpose of these so-called SYNC\footnote{Not to be confused with the SYNC pulse that is sent to the PACIFICs for synchronisation. Accidentally, the same naming has been used even though they are not directly related.} frames is the re-synchronisation of the bunch crossing IDs in the TELL40s~\autocite{fe-dataformat}. +In addition, it is required for determining the position of the first header in case of the FV data format (see \cref{sec:dataformat}). +The generation of the SYNC frames by the Cluster FPGAs is triggered by sending the SYNC fast command to the \HalfROBs{}. +The content of each SYNC frame is the 12-bit bunch crossing ID followed by a 12-bit programmable SYNC pattern that is set to 0xB4C. +The 13 least significant bits (LSBs) are occupied with the link ID. +In order to allow the TELL40s to recognise the SYNC pattern, several consecutive SYNC frames are generated by issuing multiple (typically ten) SYNC commands in a row. +By default, this process is performed at the start of every data taking run. + +Within the TELL40 firmware, the link ID is captured from the SYNC frames and stored in a dedicated register that can be read out by the control system. +By reading out these registers for every TELL40 link after initiating a short run, the Cluster FPGAs on the other end of the optical fibres can be determined and compared to expectations. + +Like this, the correct mapping of the optical data links could be confirmed on the first 9 commissioned \cframes{}. +However, one ROB on \cframe{} 8 needed to be replaced due to an issue encountered in this step. +Within T3L1Q1M2H1, the two neighbouring data links 6 and 7 were outputting incorrect link IDs. +The issue was traced back to a faulty connection between the corresponding \CB{} 3 and the \MB{} which caused the transmitted layer (L) bit from the HK FPGA to be stuck at 0. + +%Location ID (from Wilco): +%The three bits are hardwired (Connected to ground or the power supply1v5). Each connector from MB to CB has two bits, hardwired on the MasterBoard. Location ID(2-1)= 00->CB0, 01->CB1 etc. on the CB each of the FPGA has one bit Hardwired LocationID(0) 0 for FPGA0 and 1 for FPGA1. The CB FPGA has a 13 bits input bus: LocationID, the remaining 10 bits are routed from Housekeeping FPGA to all CB FPGAs + +\section{Optical Power} +\label{sec:optical-power} + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Fibre_Layout} + \caption{ + Fibre system layout for the readout and control of the front-end electronics of the upgraded \lhcbexperiment{}. + The complete system will contain about \num{15000} individual active fibres~\autocite{rainer-links}. + With \num{4096} data and \numproduct{2 x 512} control fibres, the \scifitracker{} contributes more than \qty{30}{\percent} to that. + Image adapted from Ref.~\autocite{poster-rainer}. + } + \label{fig:fibre-system-layout} +\end{figure} + +After verifying the correct fibre mapping in the previous commissioning step, a measurement of the optical power is performed. +Even though every individual fibre as well as the VTRx and VTTx modules are cleaned and optically inspected prior to connecting, it has proven to be a useful tool to cross-check for good optical links. +The latter are particularly important when operating the detector in the LHCb cavern. +As shown in \vref{fig:fibre-system-layout}, there are several hundred meters of optical fibres and a minimum of 3 breakpoints between the front-end electronics in the cavern and the readout boards in the data center on the surface of the LHCb site~\autocite{poster-rainer}. +In contrast, the fibre system layout within the commissioning setup only consists of 1 breakpoint (2 for the control links) and $\qty{15}{\meter}+\qty{60}{\meter}$ of optical fibres. + +\begin{figure} + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Optical_Power_Heatmap_C7} + \caption{Control links of \cframe{} 7} + \label{fig:optical-power-heatmap} + \end{subfigure}\\[1ex] + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Optical_Power_Hist_C7} + \caption{\cframe{} 7} + \label{fig:optical-power-c7} + \end{subfigure} + \hfill + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Optical_Power_Hist_All} + \caption{Accumulated: \cframes{} 1 to 9} + \label{fig:optical-power-acc} + \end{subfigure} + + \caption{ + Results of the optical power measurements as presented in the commissioning report of \cframe{} 7: Heatmap of the control links (a) and histogram of all links (b). + In addition, an accumulated histogram for the first 9 commissioned \cframes{} is shown (c). + } + \label{fig:optical-power} +\end{figure} + +Within the commissioning, the received power from the optical transmitters of the ROBs are measured directly with the MiniPODs that are installed on the PCIe40 cards. +For that purpose, the MiniPOD receiver modules feature a Two Wire Serial (TWS) interface to monitor the optical input power, along with other diagnostic information like module temperatures and supply voltages~\autocite{minipods-datasheet}. +However, no official specifications regarding the tolerances of these quantities were available. +Therefore, a cross-check was performed by remeasuring the optical powers of \num{96} links with a calibrated handheld power meter\footnote{MultiFiber\textsuperscript{TM} Pro by Fluke Networks}. +Both sides of the fibre connections were thoroughly cleaned between measurements. +By doing so, differences up to \qty{10}{\percent} between the optical power measurements of the MiniPODs and the handheld power meter were found. +This is in the same order as the specified tolerance of \qty{\pm 0.35}{\decibel} (corresponding to about \qty{8}{\percent}) of the power meter itself~\autocite{power-meter}. +Therefore, it was concluded that the accuracy of the MiniPODs is sufficient for the given application. + +For each commissioned \cframe{}, an automated report on the optical power readings of the MiniPODs is generated. +It includes a histogram of the measured values, as well as heatmaps of the individual control and data fibres. +The latter allow for the identification of links that lie outside the acceptable range and require further actions. +An exemplary histogram and heatmap from the optical power commissioning report of \cframe{} 7 are displayed in \cref{fig:optical-power-heatmap,fig:optical-power-c7}. +%In addition, it shows the accumulated results from the first 9 commissioned \cframes{}. + +The optical power must not only be strong enough for a stable transmission within the commissioning setup, but also for the final fibre system layout as shown in \cref{fig:fibre-system-layout}. +Therefore, a limit of \qty{224}{\micro\watt} (\qty{-6.5}{\dBm}) is applied to all links. +The unit decibel-milliwatt (dBm) states the optical power in decibels (dB) relative to \qty{1}{\milli\watt}: +\begin{equation} + P\,[\unit{\dBm}] = 10 \cdot \text{log}_{10}\left( P\,[\unit{\milli\watt}] / \qty{1}{\milli\watt} \right)\,. +\end{equation} +It is often used because of the convenience to incorporate losses (in dB) through simple addition. + +The limit is derived based on a previous study that evaluated the Versatile Link power budget in the context of the \lhcbexperiment{} assuming \qty{400}{\meter} of optical fibres and three breakpoints~\autocite{versatile-link-application-note}. +The relevant values from that study in the upstream direction, i.e. the transmission from the front- to the back-end electronics, are summarised in \vref{tab:power-budget}. +The resulting minimal transmission power of \qty{-6.5}{\dBm} (\qty{224}{\micro\watt}) is taken as the limit for the commissioning. +Note that this assumes a lossless transmission within the commissioning setup, thus providing an additional safety margin in the order of \qtyrange[range-phrase=--,range-units=single]{1}{2}{\decibel}. + +\begin{table} + \centering + \caption{ + Optical power budget of the final fibre system layout of the \lhcbexperiment{} in the upstream direction. + Values taken from Ref.~\autocite{versatile-link-application-note}. + } + \label{tab:power-budget} + \begin{tabular}{@{}llS@{}} + \toprule + Description & Unit & {Power (loss)} \\ \midrule + \multirow{2}{*}{Max. Rx sensitivity} & \unit{\micro\watt} & 78 \\ + & \unit{\dBm} & -11.1 \\ \hline + Fibre attenuation & \unit{\decibel} & 0.95 \\ + Insertion loss & \unit{\decibel} & 2.25 \\ + Mode dispersion & \unit{\decibel} & 1.3 \\ + Fibre radiation & \unit{\decibel} & 0.1 \\ \hline + \multirow{2}{*}{Min. Tx power} & \unit{\dBm} & -6.5 \\ + & \unit{\micro\watt} & 224 \\ \bottomrule + \end{tabular} +\end{table} + +In practice, a soft limit of \qty{300}{\micro\watt} is used during the commissioning. +For links below that value, an additional cleaning iteration is carried out. +In the process, the transmitter modules as well as the fibre ends are optically inspected and, if required, cleaned again. +Despite the additional effort, 9 control and 10 data links still had an optical power reading below \qty{300}{\micro\watt} within the commissioning of the first 9 \cframes{}, as shown in \cref{fig:optical-power-acc}. +Measured against a total of \num{3528} upstream links, this corresponds to a share of \qty{0.5}{\percent}. +However, the optical power was still above the critical limit of \qty{224}{\micro\watt} in all cases and the components were therefore released for operation. + + + +\section{Temperature Sensors} +\label{sec:temperatures} + +As introduced in \cref{ch:fee}, the SciFi front-end electronics are equipped with various resistance thermometers that enable the temperature monitoring of the boards and components. +An overview of the temperature sensors in use is given in \vref{tab:temp-sensors}. +Ensuring the correct functioning of these sensors is the task of this commissioning step. +Moreover, monitoring the temperatures of the water cooled electronics has proven to be a useful tool to detect an incorrect mounting of the ROBs on the \cframe{}. + +\begin{table} + \centering + \caption{Temperature sensors in use on the SciFi front-end electronics.} + \label{tab:temp-sensors} + \begin{tabular}{@{}llrrcc@{}} + \toprule + \multirow{2}{*}{\bfseries Part} & \multirow{2}{*}{\bfseries Type} & \multicolumn{2}{c}{\bfseries Amount per} & {\bfseries Typical} & \multirow{2}{*}{\bfseries Tolerance} \\ + & & Part & ROB & {\bfseries Temperatures} & \\ \midrule + Master Board & NTC (\qty{4.7}{\kilo\ohm}) & 8 & 16 & \qtyrange{20}{35}{\celsius} & \qty{\pm3}{\celsius} \\ + $\rightarrow$ Master SCA & SCA internal & 1 & 2 & \qtyrange{20}{35}{\celsius} & \qty{\pm2}{\celsius} \\ + Cluster Board & Pt1000 & 3 & 24 & \qtyrange{20}{35}{\celsius} & \qty{\pm2}{\celsius} \\ + $\rightarrow$ Cluster SCA & SCA internal & 1 & 8 & \qtyrange{20}{35}{\celsius} & \qty{\pm2}{\celsius} \\ + PACIFIC Board & Pt1000 & 2 & 16 & \qtyrange{20}{35}{\celsius} & \qty{\pm2}{\celsius} \\ + SiPM array & Pt1000 & 1 & 16 & \qty{-40}{\celsius} (to \qty{30}{\celsius}) & \qty{\pm2}{\celsius} \\ \bottomrule + \end{tabular} +\end{table} + +\subsubsection{Tolerances} +During the commissioning of the first \cframe{}, variations by more than \qty{20}{\celsius} between neighbouring sensors were observed, which considerably exceeded the expected tolerances. +It resulted from the fact that no variations in the \qty{100}{\micro\ampere} current, which is generated by the GBT-SCAs to operate the temperature sensors (see \cref{sec:cluster-sca}), were taken into account. +In order to increase the accuracy of the sensors, the current source of each SCA had to be measured accurately. +To achieve this, the connector saver boards of the FE-Tester were redesigned and now feature a high precision $\qty{4.7}{\kilo\ohm} \pm \qty{0.01}{\percent}$ resistor~\autocite{fe-tester}. +It connects to the same ADC input line that is normally used for the monitoring of the SiPM temperature via a Pt1000. +By knowing the resistance and measuring the voltage drop with the ADC, the generated current by the SCA can be calculated using Ohm's law as +\begin{equation} + I_\text{src} = \frac{V_\text{ADC}}{R} = \frac{V_\text{ADC}}{\qty{4.7}{\kilo\ohm} \pm \qty{0.01}{\percent}}\,. +\end{equation} +The uncertainty of the voltage measurement is given by the integral nonlinearity (INL) of the ADC that amounts to $\text{INL} < \qty{2}{LSB}$ in case of the GBT-SCA~\autocite{gbt-sca-manual}. +With the 12-bit resolution ADC covering the range between \qtyrange[range-phrase={ and }]{0}{1}{\volt} (see \cref{sec:cluster-sca}), this corresponds to an error $\Delta V_\text{ADC} = \qty{0.49}{\milli\volt}$. +Compared to the high precision resistor, it is the dominating uncertainty of the current source measurement resulting in an accuracy of $\Delta I_\text{src} = \qty{\pm 0.1}{\micro\ampere}$. + +Using the described method, the current source of all Cluster SCAs installed on the first 9 \cframes{} were determined. +This was done as part of the test procedure of the ROBs on the two FE-Tester setups. +The distribution of the determined values is shown in \vref{fig:currsrc}. +By performing a Gaussian fit to the data, the mean value and standard deviation are estimated to be about \qty{98}{\micro\ampere} and \qty{4}{\micro\ampere}, respectively. +%Note that only the current source of the Cluster SCAs can be measured in that way, since an ADC line is easily accessible via the SiPM connectors. + +\begin{figure} + \centering + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/CurrSrc} + \caption{ + Distribution of the currents as generated by the Cluster SCAs of the \num{196} ROBs installed on \cframes{} 1 to 9. + Measured as part of the FE-Tester test procedure. + A Gaussian fit is overlaid. + } + \label{fig:currsrc} + \end{minipage} + \hfill + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/commissioning/Temperatures} + \caption{ + Readings of the temperature sensors during the commissioning of the first 9 \cframes{}. + } + \label{fig:temperatures} + \end{minipage} +\end{figure} + +With the precise knowledge of the current source, the temperature accuracy of the Pt1000 sensors located on the Cluster and PACIFIC Boards, as well as the SiPM arrays, is given by the INL of the ADCs used to measure the voltage drop. +It accounts for an uncertainty of \qty{\pm 1.3}{\celsius}, while the contribution from the current source amounts to \qty{\pm 0.3}{\celsius}. +The tolerance of the Class B Pt1000 sensors in use add another \qty{\pm 0.3}{\celsius} resulting in the total tolerance of about \qty{\pm 2}{\celsius} for the corresponding temperature readings of the sensors. +Note that the uncertainties were simply added up linearly in that case since the underlying distributions are not known. +However, since the sources of errors are production tolerances and integral nonlinearities, the total uncertainty of \qty{\pm 2}{\celsius} can be understood as a tolerance as well, meaning that the true value is in any case within the given interval. + +In case of the NTC thermistors located on the Master Boards, the current source is still the limiting factor of the precision. +Since the generated current by the Master SCAs cannot be determined in the same way, one has to assume a spread of about \qty{\pm 10}{\micro\ampere} that covers \qty{99}{\percent} of the distribution shown in \vref{fig:currsrc}. +However, due to a much steeper characteristic curve compared to the Pt1000 sensors, the resulting uncertainty on the temperature measurement only amounts to about \qty{2.4}{\celsius}. +The INL can be neglected in this case, while another \qty{0.7}{\celsius} has to be added that takes the \qty{3}{\percent} tolerance of the used NTC thermistors into account. + +No further details about the internal SCA temperature sensors were available. +However, a similar spread as for the Pt1000 sensors was observed. +Therefore, the same tolerance of \qty{\pm 2}{\celsius} is assigned to both the Master and Cluster SCA's internal sensors. + + +\subsubsection{Temperature Readings} +As part of the front-end electronics commissioning, the values of all 82 temperature sensors located on each ROB are recorded. +Similar to the measurement of the optical power, an automated report is generated that includes summary plots and highlights malfunctioning sensors. +A sensor is considered faulty if it returns an unrealistic reading, meaning a value below the cooling water temperature of \qty{20}{\celsius} or more than \qty{15}{\celsius} above. + +During the commissioning of the first 9 \cframes{}, only 1 of the total of \num{16072} temperature sensors was found to be defective. +The sensor concerned is a Pt1000 located on the backside of an SiPM array that reads temperatures beyond \qty{80}{\celsius}. +Using a multimeter, it was found that the resistance deviated by about \qty{20}{\percent} from the nominal value. +It was decided to keep the affected SiPM array on the \cframe{} and instead mask the temperature readings from it within the control software. + +\Vref{fig:temperatures} shows the temperature readings of the remaining \num{16071} sensors, with the cooling water temperature set to \qty{20}{\degree}. +As can be seen, the sensors on the \PB{}s return the largest values. +This is because they receive a weaker cooling capacity since they are furthest away from the cooling block that is located just below the \MB{}s. +In addition, the PACIFICs draw a significant amount of power. + +Note that the Novec cooling plant was not used in parallel to the electronics commissioning of the \cframes{}. +Therefore, the temperature of the SiPM arrays essentially follows the temperature in the assembly hall resulting in large variations throughout the year depending on the time of the commissioning. +Due to the water cooling, these seasonal effects are only faintly noticeable at the front-end electronics within the ROBs. +% 1°C per room temperature change of 5°C: Study by Jessy Daniel https://drive.google.com/file/d/1B6r5rLO81vgtlka82J5cNYD-bvWSPOTU/view + +\subsubsection{Mounting Check} +In addition to the functional tests of the individual sensors, the monitoring and comparison of the temperature readings revealed several deficiencies in the mounting of the ROBs during the commissioning of the first 9 \cframes{}. +\Vref{fig:mounting-deficiency} shows an exemplary plot of the automated commissioning report that uncovered such an issue on \mbox{\cframe{} 1}. +It turned out that the significantly higher temperature readings of the ROB T3L2Q2M4 compared to the neighbours were caused by a pinched cable between the ROB and the cooling block, which prevented a good mechanical and thermal contact between the two. +Apart from this case, three further ROBs with insufficient thermal couplings to the cooling blocks due to loosely tightened screws were identified and corrected during the commissioning of subsequent \cframes{}. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/commissioning/Boardtemps_T3L2Q2} + \caption{ + Temperature readings of the front-end electronics located on T3L2Q2. + With the help of this plot as presented in the automated commissioning report, a mounting deficiency of the ROB T3L2Q2M4 was identified. + } + \label{fig:mounting-deficiency} +\end{figure} + +Another type of problem that can be revealed in this way are faulty connections of the SiPM flex cables. +Plugging in these high density connectors is a delicate operation that occasionally does not succeed perfectly when connecting up to \num{384} SiPMs per \cframe{}. +Depending on the severity, this either leads to a poor conductivity or no electrical connection at all. +As a result, unrealistic temperatures are measured by the Pt1000 on the backside of the SiPM array. + +This type of error occurred mainly with the first 4 \cframes{}. +During that time, 10 partially loose SiPM flex cables were detected and corrected in this way. +Thereby, valuable time could be saved in the later, more time consuming commissioning steps in which these issues would have appeared as dead channels. +%C-Frame 3: 8 SiPMs +%C-Frame 4: 1 SiPM +%C-Frame 2: 1 SiPM + +\section{Voltage Sensors} +\label{sec:voltages} +Following the functional tests of the temperature sensors, the voltage monitoring circuits are examined in this commissioning step. +As introduced in \cref{ch:fee}, each \HalfROB{} is equipped with one circuit to monitor the low voltage (LV), and 16 circuits to monitor the high voltage (HV) for each SiPM die. + +\subsection{Low Voltage} +\begin{figure} + \centering + \begin{minipage}{0.42\textwidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/LV_Monitoring} + \caption{ + Low voltage monitoring circuit. + Resistance values taken from Ref.~\autocite{mb-edms}. + } + \label{fig:lv-monitoring} + \end{minipage} + \hfill + \begin{minipage}{0.56\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/commissioning/LV} + \caption{ + Monitored input voltages of the \HalfROBs{} mounted on \cframes{} 1 to 9. + } + \label{fig:lv} + \end{minipage} +\end{figure} + +The monitoring of the \HalfROB{} input voltage is based on the voltage divider as shown in \vref{fig:lv-monitoring}, which is located on the \MB{}. +Using this circuit, the input voltage is given by +\begin{equation} + V_\text{in} = \frac{R_1+R_2}{R_2} V_\text{mon} = 21 V_\text{mon} \quad \text{with} \quad R_2 = \left(\frac{1}{R_{21}}+\frac{1}{R_{22}}\right)^{-1} = \qty{500}{\ohm}\,, +\end{equation} +where the monitoring voltage $V_\text{mon} \in [0,1]\,\unit{\volt}$ is measured with the ADC of the Master SCA. +With the two (effective) resistors $R_1$ and $R_2$ in series, each with a tolerance of \qty{\pm 1}{\percent}, only a rough estimation with an accuracy of \qty{\pm 2}{\percent} is possible\footnote{Due to the unknown distribution of the production tolerances, they are again simply added up linearly to estimate the resulting tolerance.}, which corresponds to about \qty{140}{\milli\volt} for typical input voltages. + +The value of the external supply voltage is critical for the correct functioning of the ROBs since the FEASTMP DC-DC converters require an input voltage $>\qty{6.5}{\volt}$ for a stable operation. +During the commissioning, it is verified that the value is above that limit. +\Vref{fig:lv} shows the monitored input voltages of the \HalfROBs{} mounted on \cframes{} 1 to 9 with a median value of \qty{7.1}{\volt}. +The difference to the set voltage of \qty{8}{\volt} at the MARATON power supply is due to voltage drops in the power cables. +Significantly lower values would be an indication for unknown resistances in the power line, i.e. due to improper connections of plugs and terminals. + +As outlined in \cref{sec:commissioning-infrastructure}, one MARATON channel generally powers two neighbouring ROBs that draw a typical current of \qty{20}{\ampere}, i.e. \qty{5}{\ampere} per \HalfROB{}. +However, since there are only five ROBs per quadrant on the \cframes{} belonging to stations T1 and T2, the outer ROBs (M4) on these \cframes{} do not share a MARATON channel with a neighbour. +Consequently, the voltage drops in the cables are halved for these ROBs, resulting in larger values of the monitored input voltages around \qty{7.6}{\volt}. + +During the commissioning, it was found that one MARATON channel was outputting a lower voltage than the nominal \qty{8}{\volt}. +As a result, the \HalfROBs{} that were powered by this channel were monitoring input voltages below \qty{6.8}{\volt}, as can be identified as a small peak on the left in \vref{fig:lv}. +However, they were still above the limit of \qty{6.5}{\volt} and operating stably throughout the commissioning, along with all the other ROBs mounted \cframes{} 1 to 9. + + +\subsection{High Voltage} +\begin{figure} + \centering + \begin{minipage}{0.35\textwidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/HV_Monitoring} + \caption{ + High voltage monitoring circuit. + Resistance values taken from Ref.~\autocite{pb-edms}. + } + \label{fig:hv-monitoring} + \end{minipage} + \hfill + \begin{minipage}{0.63\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/commissioning/HV} + \caption{ + Monitored bias voltages applied to the SiPM dies of \cframes{} 1 to 9. + } + \label{fig:hv} + \end{minipage} +\end{figure} + +The HV monitoring circuits are located on the \PBs{}. +For each HV line powering one SiPM die consisting of \num{64} channels, a voltage divider as shown in \vref{fig:hv-monitoring} is implemented. +To reduce the current consumption due to the monitoring circuits, large resistors were selected. +The conversion between the applied bias voltage and the monitored voltage as measured with the ADC of the Cluster SCAs is given by +\begin{equation} + V_\text{bias} = \frac{R_{11}+R_{12}+R_2}{R_2} V_\text{mon}\,. + \label{eq:hv-monitoring} +\end{equation} + +Despite the low tolerance resistors ($\pm \qty{0.1}{\percent}$) in use, it was decided to perform a calibration of the monitoring circuits when testing the ROBs on the FE-Tester setups. +As discussed in \cref{sec:sipm}, the SiPM gain depends critically on the applied voltage which is why a precise monitoring is required in this case. +To perform the calibration, bias voltages in the range from \qtyrange{5}{70}{\volt} are applied in steps of \qty{1}{\volt} using a high precision power supply. +By recording the monitored voltage for each bias voltage and performing a linear fit, the conversion factor is determined for each individual HV line. +In addition to the slope, which reflects the conversion factor in \cref{eq:hv-monitoring}, the intercept is also determined by the fit to account for small ($\sim$\unit{mV}) variations due to grounding fluctuations~\autocite{fe-tester}. + +During the front-end electronics commissioning on the \cframes{}, an initial check of the HV monitoring is carried out by applying \qty{50}{\volt} to the SiPMs using the CAEN power supply modules. +\Vref{fig:hv} shows the monitored bias voltages as calculated using the conversion factors determined during the HV calibration on the FE-Testers. +As can be seen, the distribution is not centered around the nominal voltage and shows a relatively large spread. +Using a multimeter, sample checks were performed and confirmed that the applied voltage is indeed \qty{50}{\volt} and only deviates from it by up to \qty{50}{\milli\volt} in accordance with the specification of the CAEN modules~\autocite{caen-module}. +Therefore, it was concluded that the HV calibration parameters cannot be applied directly from the FE-Tester to the \cframe{} commissioning setup and a re-calibration had to be performed. +Although the exact reasons for the deviations could not be clarified, differences in the grounding are assumed to play an important role. + +At this stage, the monitored bias voltages are considered okay if they differ by less than \qty{\pm 1}{\volt} from the applied voltage. +During the commissioning of the first 9 \cframes{}, it occurred only once that the measured value was outside of this range: +The monitoring circuit of one SiPM die on \cframe{} 7 reported a voltage of \qty{0}{\volt}. +It was found that the SiPM die was indeed not biased, which was due to a broken HV line within the associated ROB. +The issue was resolved by replacing the ROB. + +\section{High Voltage Monitoring Calibration} +\label{sec:hv-calibration} +As mentioned in the previous section, it was found that the calibration of the HV monitoring circuits had to be repeated during the commissioning in order to achieve acceptable results. +For this purpose, using the CAEN power supply, bias voltages between \qtyrange[range-phrase={ and }]{20}{56}{\volt} are scanned in a non-equidistant manner with an emphasis on values around the expected operational voltage ($> \qty{50}{\volt}$). +Afterwards, a linear fit is performed in order to calibrate the conversion factor between the monitored and bias voltage as given in \cref{eq:hv-monitoring}. +An example is shown in \vref{fig:hv-fit}. + +\begin{figure} + \centering + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/HV_Fit} + \caption{ + Linear fit to calibrate the bias voltage monitoring with the determined slope ($p_1$) and intercept ($p_0$) overlaid. + } + \label{fig:hv-fit} + \end{minipage} + \hfill + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/commissioning/HV_Calibrated} + \caption{ + Monitored bias voltages applied to the SiPMs after the HV calibration of \cframes{} 1 to 9. + } + \label{fig:hv-calibrated} + \end{minipage} +\end{figure} + +This procedure is applied to all monitoring circuits during the front-end electronics commissioning. +Subsequently, the check from the previous commissioning step is repeated: +A bias voltage of \qty{50}{\volt} is applied to all SiPMs and compared against the monitored voltages. +\Vref{fig:hv-calibrated} shows the monitored values after the HV calibration of the first 9 commissioned \cframes{}. +In contrast to \cref{fig:hv}, the obtained distribution is now centered around the applied voltage and varies with a standard deviation $\sigma = \qty{19}{\milli\volt}$ about 5 times less than before the calibration. +The maximum deviation of the total of \num{6272} HV monitoring circuits after the calibration of \cframes{} 1 to 9 was found to be \qty{\pm 100}{\milli\volt}. + + +\section{Bit Error Rate Tests} +\label{sec:ber} +Even though the Bit Error Rate (BER) tests of the optical data transmission are not scheduled as the subsequent commissioning step, they form the basis for the clock timing scans as presented in \cref{sec:timing_scans}. +Therefore, the BER tests are discussed here at first. + +The BER is defined as the number of bit errors divided by the total number of transmitted bits for a data link. +Following the operating specifications of the Versatile Link, the \scifitracker{} aims at achieving error rates below $10^{-12}$~\autocite{versatile-link-application-note}. +This includes the electrical data transfer within the front-end electronics, as well as via the optical links. +The basis for the latter is a sufficient optical power as verified in a previous commissioning step (see \cref{sec:optical-power}). + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Clocking_Scheme} + \caption{ + Clocking scheme of the SciFi front-end electronics. + The error-free data transmission relies on the clock domain crossings labelled as (A)--(E). + BER test patterns can be generated at three different points along the data path as indicated by the thick arrows. + } + \label{fig:clocking-scheme} +\end{figure} + +An error-free transmission of the data within the ROBs requires the precise coordination of various functional blocks. +The careful tuning of the underlying clocks to allow for this is described in \cref{sec:timing_scans}. +\Vref{fig:clocking-scheme} illustrates the interplay between the different components: +The SiPM signals digitised by the PACIFIC ASICs are transfered at \qty{320}{\mega\bit/\second} to the Cluster FPGA. +In a first stage inside the FPGA, the serial data is deserialised in order to perform the clustering in the subsequent step. +Afterwards, the clustered data is again serialised in order to be transfered to the Data GBTX, which prepares the GBT frames to be sent via the optical link to the back-end. + +In addition to the normal operating mode as just described, \vref{fig:clocking-scheme} shows two types of test patterns that can be generated at three different points along the path of the data. +These patterns are used to determine the BER of each data link and are discussed in detail in the following. + +\subsubsection{GBTX PRBS} +The GBTX PRBS is one of two BER test patterns used in the SciFi front-end electronics. +As the name suggests, it consists of a pseudorandom binary sequence (PRBS) that is generated by the GBTX ASIC. +It is implemented by a 7-bit linear feedback shift register that produces a PRBS7 sequence~\autocite{gbtx-manual}. +The register value is copied 16 times to fill the 112 bits of payload of the GBT frame. + +Due to the pseudorandom nature of the pattern, an appropriate decoder at the back-end can predict the sequence and compare it against the received data. +It counts the numbers of mismatches, i.e. the bit errors in the transmission, and stores them in a register to be read via the control software. +A separate 8-bit counter exists for each 7-bit pattern. +Like this, the BER can be determined. + +In addition to being generated by the GBTX ASIC, the identical PRBS generator has been implemented in the Cluster FPGA firmware. +The advantage is that a larger part of the data chain can be tested, since the transmission from the Cluster FPGA to the Data GBTX is also included in this case. +This part of the data chain is particularly relevant as it involves a plug connection between the Cluster and Master Board, which may be susceptible to a bad electrical contact. +Since the same GBTX PRBS sequence is used, no additional resources are required at the back-end. + +Starting from the commissioning of \cframe{} 4, a BER test utilising the GBTX PRBS generated by the Cluster FPGAs is an integral part of the commissioning procedure. +The importance of these checks were duly noted in the course of the operation and commissioning. +Two overnight runs with a duration of at least \qty{9}{\hour} per run are performed. +Due to DAQ firmware limitations (see \cref{sec:commissioning-daq}), two runs need to be performed to cover all data links of each \cframe{}. +Prior to \cframe{} 4, these measurements were only done occasionally and with shorter durations. + +In total, \num{6.1e17} bits were probed during the tests up to the commissioning of \cframe{} 9. +In the process, \num{9} errors were found resulting in a BER of \num{1.5e-17}, which is well below the target rate of $10^{-12}$. + +\subsubsection{PACIFIC SyncPattern} +\label{sec:syncpattern} +The PACIFIC SyncPattern is the second type of test patterns that are implemented in the SciFi front-end electronics. +As shown in \cref{fig:clocking-scheme}, it is generated by the PACIFIC ASICs and from there follows the complete data chain. +The exact pattern is determined by a group of four pads that are driven by the Cluster FPGA. +Thereby, it can be chosen from a total of 16 different patterns. +In order to produce the 8-bit word per PACIFIC output line and bunch crossing, the 4-bit input is concatenated with itself in reverse order as illustrated in \vref{fig:syncpattern}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/PACIFIC_SyncPattern} + \caption{ + PACIFIC SyncPattern generation. + The 4 input bits are concatenated with itself in an inverted manner to avoid that phase shifts by \qty{12.5}{\nano\second} remain undetected. + } + \label{fig:syncpattern} +\end{figure} + +A custom TELL40 firmware block has been developed that analyses the received patterns at \qty{40}{\mega\hertz} and counts the number of detected bit errors. +For each PACIFIC channel, i.e. two output bits, there is a separate 8-bit counter that can be read out by the control system. +However, this process requires that the PACIFIC output is passed through by the Cluster FPGA in its raw format. +Due to bandwidth limitations, the raw data format used for this purpose has four modes, each containing the 2-bit outputs of \num{32} PACIFIC channels. +Therefore, to probe the data transmission of all \num{128} channels associated with one Cluster FPGA, four separate BER tests utilising the PACIFIC SyncPattern need to be performed. + +Starting from the commissioning of \cframe{} 5, the procedure has been standardised to record data for \qty{3}{\hour} for each group of \num{32} channels. +In addition, the tests are performed with two complementary PACIFIC SyncPatterns +\[ + \begin{aligned} + 0\text{x}5 &\rightarrow 0\text{b}1010\,0101 \quad\text{and} \\ + 0\text{xA} &\rightarrow 0\text{b}0101\,1010. + \end{aligned} +\] +Thereby, a total of \qty{24}{\hour} are required to cover all four raw data modes and both patterns. +Due to the DAQ firmware limitations used for the commissioning in the assembly hall (see \cref{sec:commissioning-daq}), the process needs to be performed separately for both the upper and lower half of each \cframe{}. + +Up to the commissioning of \cframe{} 9, \num{7.7e17} bits were probed in this way. +The number of observed errors is with about \num{2500} significantly larger than the BER tests utilising the GBTX PRBS generated by the Cluster FPGAs. +However, the nature of the errors, which mostly occurred in all \num{32} observed channels per link, suggests that they are related to the generation of the PACIFIC SyncPattern itself, rather than the actual data chain. +The exact cause, however, could not yet be clarified. +Despite this effect, the resulting BER of \num{3.2e-15} is still well below the target rate of $10^{-12}$. + +%==== PACIFIC SyncPattern ==== +%Bits total: 7.726749e+17 +%Errors total: 2539 +%=> Min BER: 3.285987232389575e-15 +%=> Max BER: 6.57197446477915e-15 + +\subsubsection{Loss of Frame-Lock in Control Links} +During the BER tests, which typically run for several hours at once, the optical links are also monitored for losses of the acquired frame-locks. +As described in \cref{sec:master-gbtx-communication}, this happens when the GBT frame header is not recognised correctly for a few times. +Since all communication to the ROBs takes place via the optical control links, it is one of the most critical failures that can occur. + +During the SciFi front-end electronics commissioning, temporary losses of frame-locks have been observed occasionally with some ROBs after a few hours of operation. +It later turned out that there is a general issue with the used VTRx modules that may occur with some units due to manufacturing problems related to insufficient epoxy curing~\autocite{vtrx-issue}. +Of the total of \num{392} commissioned \HalfROBs{} mounted on the \cframes{} 1 to 9, this type of failure was observed 6 times, corresponding to a rate of affected control links of \qty{1.5}{\percent}. +The affected ROBs were replaced with spares for further evaluation and repair. + + +\section{Clock Timing Scans} +\label{sec:timing_scans} +In order to achieve low transmission error rates as presented in \cref{sec:ber}, a careful tuning of the relative phases of various clocks is necessary. +Within each data link, a total of six clocks need to be adjusted that affect the internal data transmission within the front-end electronics. +The contributing clocks are shown in \cref{fig:clocking-scheme} and range from the \qty{320}{\mega\hertz} (\qty{3.125}{\ns} clock period) PACIFIC clocks to the clustering blocks of the FPGAs that are operating at \qty{40}{\mega\hertz} (\qty{25}{\ns}). +Note that the \qty{40}{\mega\hertz} clock that the Data GBTX receives from the Master GBTX does not have an impact on the internal data transmission, since it serves as the common reference for the generation of the remaining clocks. +However, it will become relevant during beam data taking as it allows to time align the data taking and processing to the LHC collisions. + +\begin{figure} + \centering + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Eye_Diagram} + \caption{ + Characteristics of an eye diagram. + Image adapted from Ref.~\autocite{eye-diagram}. + } + \label{fig:eye-diagram} + \end{minipage} + \hfill + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/commissioning/Serialiser_SingleCh} + \caption{ + Determined bit errors of one PRBS7 word depending on the phase between the Cluster FPGA Serialiser and the Data GBTX. + } + \label{fig:serialiser-singlech} + \end{minipage} +\end{figure} + +The aim of the clock phase tuning is to achieve the highest possible stability in the data transfer between the different processing blocks. +This is accomplished when the incoming bit stream from one block to the next is sampled in the centre of the bit period. +\Vref{fig:eye-diagram} illustrates this by means of an eye diagram, which is the superimposed representation of all possible digital waveforms. +As the sampling time approaches the edges of the eye diagram, bit errors start to occur due to jitter and incorrect sampling of the data. + +In practice, the tuning of the involved clocks consists in varying their phases one by one in both directions until bit errors occur. +Like this, it is possible to determine the bit period and thus the optimal sampling time, which is located in the centre. +The detection of bit errors is enabled by using the BER test patterns introduced in \cref{sec:ber}. + +One difficulty is that an isolated tuning of the individual phases is generally not possible. +When using the GBTX PRBS as generated by the Cluster FPGA, both the \qty{40}{\mega\hertz} clustering and \qty{80}{\mega\hertz} serialiser clock need to be correctly adjusted in order to allow for a stable data transmission. +On the other hand, when injecting the PACIFIC SyncPattern, all six clock phases must be set properly. +Since scanning all possible combinations in the six-dimensional space is not feasible, the practical approach is to start from a (semi-)stable configuration and vary the phases based on this. +Thereby, starting from the processing blocks most upstream of the data chain, i.e. going from right (A) to left (E) in \cref{fig:clocking-scheme}, the bit periods and thus the optimal settings can be determined one after another. + +During the start of the commissioning, the procedure has not been fully implemented in the control software. +This is because it requires a complex interaction between the front- and back-end electronics in a way that was not foreseen by the centrally provided DAQ system. +Therefore, the results presented in the following do not include the first 2 commissioned \cframes{} 1 and 3. +However, the remaining 7 \cframes{} covered here contain \num{152} ROBs, corresponding to \qty{60}{\percent} of the complete detector. + +\subsection{FPGA Serialiser $\rightarrow$ Data GBTX (A)} +The first clock domain crossing to be optimised is between the Cluster FPGA Serialiser and the Data GBTX - labelled as (A) in \cref{fig:clocking-scheme}. +This is achieved by shifting the phase of the Serialiser clock in steps of about \qty{100}{\pico\second}, while the (internal) clock of the GBTX remains unchanged. +As shown in \cref{fig:clocking-scheme}, the GBTX PRBS pattern generated by the Cluster FPGA can be used for this purpose. +Utilising this pattern, the number of bit errors can be determined in units of 7 bits, which are referred to as PRBS7 words in the following. +Thereby, with 112 bits of payload in the GBT wide frame mode, 16 separate counter values are available for every data link. + +\begin{figure} + \centering + \includegraphics[width=0.85\textwidth]{figures/commissioning/Serialiser_ModuleIntervals} + \caption{ + For an exemplary ROB, the error-free intervals in the phase between the Cluster FPGA Serialiser and the Data GBTX are shown. + One ROB comprises 16 individual data links (i.e. 16 different clock domain crossings) with 16 PRBS7 words each, resulting in the total of \num{256} words and corresponding error counters. + } + \label{fig:serialiser-module} +\end{figure} + +An exemplary result of an FPGA Serialiser clock timing scan is given in \vref{fig:serialiser-singlech}. +It shows the number of detected bit errors depending on the clock phase for one PRBS7 word within one data link. +For every phase configuration, 500k GBT frames at \qty{40}{\mega\hertz} are recorded. +Within a central interval, no errors are found. +At the edges, the number of errors increases and quickly reaches the limit of \num{255}, which is due to the underlying 8-bit error counters. + +An important thing to note is that during the scan of the phase between the Serialiser and Data GBTX, the phase between the Clustering and the Serialiser clocks is kept constant. +This is achieved by shifting the Clustering clock in parallel to the Serialiser and is necessary because the GBTX PRBS pattern is generated at the level of the Clustering block. +Therefore, varying the timing of the Serialiser alone does not provide useful information since it affects both the upstream and downstream clock domain crossings in an interfering manner. + +The error-free intervals for an exemplary ROB including 16 Cluster FPGA-Data GBTX pairs and thus 16 corresponding clock domain crossings are shown in \vref{fig:serialiser-module}. +Local variations due to differences in the routing lengths and signal qualities can be identified. +%In addition, a macroscopic shift in units of \num{32} PRBS7 words between \num{128} and \num{160} can be observed that corresponds to a physical \CB{}. +Furthermore, the overlap of the intervals is indicated, which represents the common error-free interval of all \num{152} ROBs for which this measurement has been performed. +In practice, this means that all data links can be operated stably with the identical clock phase configuration between the Cluster FPGA Serialiser and the Data GBTX. +By setting the phase in the centre of the \qty{3.2}{\ns} wide common interval, the margin of error towards both edges amounts to at least \qty{1.6}{\ns} for all links. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Serialiser_CentersWidths} + \caption{ + Error-free intervals in the phase between the Cluster FPGA Serialiser and Data GBTX clock. + The distributions of the interval centres (left) and widths (right) include data from \num{152} ROBs as obtained during the front-end electronics commissioning. + The theoretical limit of \qty{6.25}{\ns} on the width results from the transmission speed of \qty{160}{\mega\bit/\second} per lane. + } + \label{fig:serialiser-histograms} +\end{figure} + +\Vref{fig:serialiser-histograms} shows summary distributions of the interval centres and widths. +Note that the absolute values of the interval centres have no further significance, but only the relative differences are relevant. +As can be seen, the centres lie well within the interval overlap of all \num{152} included ROBs. +On the other hand, the interval widths are a measure of the signal quality. +The distribution shows a narrow peak around the mean value of \qty{5.24}{\ns}, which is about \qty{16}{\percent} smaller than the theoretical limit of \qty{6.25}{\ns}. +In addition, a shoulder-like bump towards lower values can be identified that indicates electrical lines with slightly lower signal quality. +The theoretical limit is calculated based on the transmission speed of \qty{160}{\mega\bit/\second} per lane between the Cluster FPGA and Data GBTX. +Thereby, under ideal conditions, the signal levels can be sampled accurately over the complete bit period of \qty{6.25}{\ns}. +However, as illustrated in \cref{fig:eye-diagram}, due to finite fall and rise times as well as jitter, the measured error-free interval widths will always be below this value. + + +\subsection{FPGA Clustering $\rightarrow$ Serialiser (B)} +After tuning the phase between the Cluster FPGA Serialiser and the Data GBTX in the previous step by setting it to be in the centre of the interval overlap, a scan of the Clustering clock is performed. +Thereby, the stable phase intervals between the FPGA Serialiser and Clustering blocks can be determined, corresponding to the clock domain crossing (B) in \cref{fig:clocking-scheme}. +Again, the GBTX PRBS test pattern as generated by the Clustering block is used. + +The bit-error-free intervals for an exemplary ROB are shown in \vref{fig:clustering-module}. +A very regular pattern can be recognised that repeats itself every \num{16} PRBS7 words, i.e. in units of individual data links and Cluster FPGAs. +This is due to the fact that the clock domain crossing examined in this step happens entirely within the FPGA itself. +Therefore, the observable pattern completely depends on the firmware and the internal signal generations and routings in the FPGA. +The interval overlap of all \num{152} examined ROBs provides with a width of \qty{9.0}{\ns} plenty of margin of error when setting the common phase to lie in the centre of it. + +\begin{figure} + \centering + \includegraphics[width=0.85\textwidth]{figures/commissioning/Clustering_ModuleIntervals} + \caption{ + Error-free intervals in the phase between the Cluster FPGA Clustering and Serialiser blocks for an exemplary ROB. + The data within each individual Cluster FPGA and thus clock domain crossing is composed of 16 PRBS7 words. + } + \label{fig:clustering-module} +\end{figure} + +Summary histograms of the interval centres and widths are shown in \vref{fig:clustering-histograms}. +Due to the regularity of the intervals, the distributions differ greatly for the different PRBS7 words, i.e. different parts in the resulting GBT data frame. +This applies in particular to the interval centres. +Nevertheless, they lie well within the interval overlap as indicated in \vref{fig:clustering-module}. +Based on the internal data transmission inside the FPGA, the theoretical limit on the interval width amounts to \qty{12.5}{\ns}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Clustering_CentersWidths} + \caption{ + Error-free intervals in the phase between the Cluster FPGA Clustering and Serialiser blocks. + The distributions of the interval centres (left) and widths (right) are shown. + } + \label{fig:clustering-histograms} +\end{figure} + + +\subsection{FPGA Deserialiser $\rightarrow$ Clustering (C)} +A similar situation exists for the clock domain crossing (C) between the Deserialiser and Clustering blocks that happens entirely within the Cluster FPGA. +But unlike the previous step, the PACIFIC SyncPattern has to be used, since the GBTX PRBS pattern is generated downstream of this part of the data chain. +As discussed in \cref{sec:syncpattern}, the corresponding error detection logics in the TELL40s provide separate 8-bit error counters for the 2-bit output data of each PACIFIC channel. +Thereby, the total amount of error counters is a factor of 8 larger compared to the GBTX PRBS test pattern. +In order to record the data from all \num{128} channels per link, 4 separate runs need to be performed. + +To scan the desired phase, the FPGA Deserialiser clock is varied, while the Clustering clock is kept at the common value as determined in the previous step. +The clocks of the SYNC Pulse and the PACIFICs need to be shifted in synchronous to avoid interferences with the phases further upstream in the data chain. +\Vref{fig:deser-module} shows the error-free phase intervals for two neighbouring exemplary \CBs{}. +Similar to the previous scan (B), a regular pattern can be recognised that repeats every \num{128} channels, i.e. in units of individual Cluster FPGAs. + +Projecting the interval centres onto the y-axis for all \num{152} examined ROBs results in the distribution as shown in \vref{fig:deser-histograms}. +In addition, the interval widths including the theoretical limit are displayed. +Due to the significantly increased number of error counters (i.e. channels) per data link, a breakdown into different groups of channels as shown in \vref{fig:clustering-histograms} has been omitted in this case. + +\begin{figure} + \captionsetup[subfigure]{aboveskip=-3pt, belowskip=5pt} %Tune space between captions and subfigures + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=0.85\textwidth]{figures/commissioning/Deser_ModuleIntervals} + \caption{Cluster FPGA Deserialiser $\rightarrow$ Clustering} + \label{fig:deser-module} + \end{subfigure}\\[1ex] + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=0.85\textwidth]{figures/commissioning/Pacific_ModuleIntervals} + \caption{PACIFIC $\rightarrow$ Cluster FPGA Deserialiser} + \label{fig:pacific-module} + \end{subfigure}\\[1ex] + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=0.85\textwidth]{figures/commissioning/Sync_ModuleIntervals} + \caption{SYNC Pulse $\rightarrow$ PACIFIC} + \label{fig:sync-module} + \end{subfigure} + \caption{ + Error-free intervals in the different phases along the data chain for two exemplary neighbouring Cluster-PACIFIC Board pairs utilising the PACIFIC SyncPattern. + The individual clock domain crossings are indicated by the vertical dashed lines. + Within each data link, one Cluster FPGA processes the data from two PACIFIC ASICs with \num{64} channels each. + } + \label{fig:syncpattern-intervals} +\end{figure} + +\begin{figure} + \captionsetup[subfigure]{aboveskip=1pt, belowskip=12pt} %Tune space between captions and subfigures + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Deser_CentersWidths} + \caption{Cluster FPGA Deserialiser $\rightarrow$ Clustering} + \label{fig:deser-histograms} + \end{subfigure}\\ + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Pacific_CentersWidths} + \caption{PACIFIC $\rightarrow$ Cluster FPGA Deserialiser} + \label{fig:pacific-histograms} + \end{subfigure}\\ + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Sync_CentersWidths} + \caption{SYNC Pulse $\rightarrow$ PACIFIC} + \label{fig:sync-histograms} + \end{subfigure} + \caption{ + Error-free intervals in different phases along the data chain utilising the PACIFIC SyncPattern. + The distributions of the interval centres (left) and widths (right) are shown. + } + \label{fig:syncpattern-histograms} +\end{figure} + +\subsection{PACIFIC $\rightarrow$ FPGA Deserialiser (D)} +The last part of the data chain is between the PACIFIC ASICs and the Cluster FPGA Deserialiser. +For this, the data is serialised in the PACIFICs and transmitted to the FPGAs on the \CBs{} at rates of \qty{320}{\mega\bit/\second} per lane. +To scan the phase between the sender and receiver, the clocks of both PACIFICs within each data link are varied, while keeping the Deserialiser clock phase at the previously determined common setting. +The SYNC Pulse clock is shifted in synchronous with the PACIFIC clocks in order to maintain the same phase between them. + +Because the signals need to be transfered across multiple PCBs with length variations in the signal lanes, the resulting error-free intervals in the phase between the sender and receiver show relatively large variations as displayed in \vref{fig:pacific-module}. +This is true on the microscopic level, as well as in blocks of \num{64} channels corresponding to different PACIFIC ASICs. +Due to the high transmission rates, the overlap of all error-free intervals of the examined \num{152} ROBs only amounts to \qty{1.2}{\nano\second}. +However, as presented in \cref{sec:ber}, sufficiently low bit error rates can still be achieved by setting the phase of all PACIFIC clocks to a common setting in the centre of the overlap. +A summary of the interval centres and widths is given in the form of histograms in \vref{fig:pacific-histograms}. +As can be seen, the measured widths are only slightly below the theoretical limit of \qty{3.125}{\ns} indicating a good signal quality. + +\subsection{SYNC Pulse $\rightarrow$ PACIFIC (E)} +Even though the SYNC Pulse is not part of the data chain itself, it is still crucial for the transmission of the data since it is responsible for the synchronisation of the PACIFIC ASICs. +As described in \cref{sec:pacific_ser}, the signal is evaluated at the rising edge of the \qty{320}{\mega\hertz} PACIFIC clock. +Therefore, it is expected that the SYNC Pulse clock can be varied by about \qty{3.125}{\ns} before the signal is evaluated at the previous or next rising edge causing the output data to be shifted by one PACIFIC clock cycle. +This can be confirmed by looking at the distribution of the error-free interval widths as shown in \vref{fig:syncpattern-histograms}. +Since the SYNC Pulse is generated by the Cluster FPGA, the interval centres show a similar spread as the timing scan between the PACIFIC and the FPGA Deserialiser. + +However, as shown in the exemplary view of the intervals for two neighbouring Cluster-PACIFIC Board pairs in \vref{fig:sync-module}, the variations occur predominantly in blocks of \num{64} channels, i.e. in units of different PACIFIC ASICs. +This is due to the fact that each PACIFIC receives and processes a single SYNC Pulse. +The interval overlap of all \num{152} examined ROBs is with \qty{0.9}{\ns} in the same range as for the phase between the PACIFIC and FPGA Deserialiser clocks. + +\subsection{Conclusion} +A summary of the obtained parameters during the clock timing scans as previously presented is given in \cref{tab:timing-scans}. +As given by the centre of the overlap region of the error-free intervals, the ROBs can all be operated at the identical clock phase configuration while still achieving low bit error rates (see \cref{sec:ber}). +The smallest margin of error is present in the phase between the SYNC Pulse and PACIFIC clocks and amounts to \qty{0.44}{\ns} in both direction (\qty{0.88}{\ns} in total). + +\begin{table} + \centering + \begin{threeparttable} + \caption{ + Parameters of the error-free phase intervals as determined by the clock timing scans. + At the centre of the interval overlap (second column from the right), the SciFi front-end electronics can be operated stably with the same clock phase configuration for every ROB. + The numbers are given in \unit{\ns}. + } + \label{tab:timing-scans} + \begin{tabular}{@{}lrrrrrr@{}} + \toprule + \multirow{2}{*}{\bfseries Clock Phase} & \multicolumn{2}{c}{\bfseries Int. Centres} & \multicolumn{2}{c}{\bfseries Int. Widths} & \multicolumn{2}{c}{\bfseries Int. Overlap} \\ + & Mean $\mu$ & Std. $\sigma$ & Mean $\mu$ & Std. $\sigma$ & Centre & Width \\ \midrule + Serialiser $\rightarrow$ Data GBTX & 25.32 & 0.26 & 5.24 & 0.25 & 25.44 & 3.22 \\ + Clustering $\rightarrow$ Serialiser & 30.17 & 0.51 & 10.71 & 0.81 & 29.61 & 9.03 \\ + Deserialiser $\rightarrow$ Clustering & 2.13 & 0.30 & 5.86 & 0.33 & 1.68 & 4.35 \\ + PACIFIC $\rightarrow$ Deserialiser & 13.29 & 0.25 & 2.96 & 0.08 & 13.13 & 1.17 \\ + SYNC Pulse $\rightarrow$ PACIFC & 0.77 & 0.31 & 3.00 & 0.05 & 0.73 & 0.88 \\ \bottomrule + \end{tabular} + \begin{tablenotes}[flushleft] + \small + \item Std. $\mathrel{\hat{=}}$ Standard deviation \qquad Int. $\mathrel{\hat{=}}$ Interval + \end{tablenotes} + \end{threeparttable} +\end{table} + + +\section{Light Injection System Tests} +\label{sec:lis-tests} +In the last step of the SciFi front-end electronics commissioning procedure, the complete data chain is examined. +While the digital data transfer has already been tested and tuned during the BER tests (see \cref{sec:ber}) and clock timing scans (see \cref{sec:timing_scans}), this part also includes the analogue signal generation and processing in the SiPM and PACIFIC channels. +In the absence of ionising radiation in the assembly hall, these tests are performed with the help of the light injection system (LIS). +As described in detail in \cref{sec:lis}, the LIS allows to inject light pulses into the scintillating fibres towards the end of the fibre mats near the SiPM arrays. +Thereby, it is possible to test the full data chain and identify channels that do not register any signals from the incident photons. +This can either be caused by broken SiPM or PACIFIC channels, or due to an insufficient electrical connection between the two. + +The tests involving the LIS are subdivided into three steps that are discussed in the following. + +\subsection{Functional Test and Mapping} +As a first step, the functioning of the LIS itself is verified. +This is done only with the help of the SiPM arrays that are biased with the nominal overvoltage $\OV = \qty{3.5}{\volt}$. +By monitoring the current drawn from the CAEN modules with and without injected light pulses, the correct functioning of the LIS can be confirmed. +Typical dark currents are in the order of \qty{100}{\micro\ampere} per HV channel, corresponding to four adjacent SiPM arrays. +It increases to about \qty{200}{\micro\ampere} when illuminating the SiPMs with \qty{15}{\ns} wide LIS pulses at a rate of \qty{20}{\kilo\hertz}. +However, large variations in the light intensity can be observed that depend on the determined operating settings of the GigaBit Laser Drivers (GBLDs) during the QA of the fully assembled fibre modules. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/LIS_Routing} + \caption{ + SciFi ROB cover with the routing of the LIS GBLDs to the fibre mats indicated. + Image modified from Ref.~\autocite{fe-box-mechanics}. + } + \label{fig:lis-routing} +\end{figure} + +For further tuning of the light intensity, the mapping between the GBLDs and light bars must be known for each module. +As illustrated in \cref{fig:lis-routing}, the light bars mounted on fibre mats 0 and 2 are controlled by \HalfROB{} H0, while mats 1 and 3 are illuminated by the GBLDs connected to H1. +However, due to the routing of the LIS fibres within the end plugs of the modules, it is not clear at first which GBLD of each half connects to which of the two possible mats\footnote{Accidentally, this was not specified during the production of the modules.}. +In order to create the corresponding mapping, the current draw is monitored as described previously while enabling the individual GBLDs one by one. + + + +\subsection{Delay Scan (Lite)} +After verifying the functioning of the LIS itself and determining the mapping, the actual test consists of checking that every channel correctly detects the incident photons. +For this, it is necessary that the light pulses are triggered at the right time with respect to the PACIFIC clock such that the resulting SiPM signals are fully integrated by the PACIFIC integrators. +For an exemplary channel, \vref{fig:full-delayscan-example} shows the S-curves for different LIS pulse delays as obtained by scanning the PACIFIC comparator thresholds. +As can be seen, the characteristic step structure as described in \cref{sec:th_scan} is only visible within a few nanoseconds around the optimal delay, which amounts to \qty{29}{\ns} in this case. +On the other hand, when moving away from the optimum, the S-curves degrade until eventually only a single transition remains corresponding to the pedestal of the channel. + +\begin{figure} + \captionsetup[subfigure]{aboveskip=1pt, belowskip=12pt} %Tune space between captions and subfigures + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=0.8\textwidth,trim={0 0 0 25pt},clip]{figures/commissioning/Delayscan_example} + \caption{Full delay scan} + \label{fig:full-delayscan-example} + \end{subfigure}\\ + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=0.8\textwidth,trim={0 0 0 25pt},clip]{figures/commissioning/Delayscan_Lite_example} + \caption{Delay scan lite} + \label{fig:delayscan-lite-example} + \end{subfigure} + + \caption{ + Threshold scans of one channel for different delays of the light injection pulse (a). + The vertical dashed lines indicate the thresholds of the three PACIFIC comparators that are used for the delay scan lite (b). + } + \label{fig:delayscan-examples} +\end{figure} + +In principle, recording the \Scurves{} by scanning the PACIFIC comparator thresholds for different delays in order to find the best delay is only needed once. +However, the limitations of the available DAQ firmwares in combination with the design of the LIS requires for a delay scan for essentially every \cframe{} commissioning. +On the one hand, the SOL40 control links have different latencies in the order of \qty{\pm 25}{\ns} relative to each other. +In addition, these are not fixed but may vary after every reset. +By itself, this is unproblematic as long as each control link corresponding to a \HalfROB{} remains an isolated system, which is the case for many applications in the context of the front-end electronics commissioning. +However, due to the design of the LIS, the two halves of one ROB are closely entangled. +This is because the two inner fibre mats of one module are illuminated by light bars that are controlled by the neighbouring \HalfROB{} as illustrated in \cref{fig:lis-routing}. +Therefore, while the outer mats are read out by the same \HalfROB{} that controls the light bars, the optimal LIS delays of the inner mats are shifted in opposite directions depending on the relative latency between the two halves. + + +Doing a full delay scan as shown in \cref{fig:full-delayscan-example} is a time-consuming procedure that is not feasible to do for every \cframe{}. +With the limited firmwares and the associated software, scanning the 256 threshold DACs for a fixed delay already takes about \qty{20}{\minute}. +For this reason, a simplified version is performed that is referred to as delay scan lite. +It is based on varying the LIS delay while keeping the three comparator thresholds fixed. +Although in principle, any threshold values above the pedestal and within a few photoelectron (pe) amplitudes are suitable, they are set to the default settings of $[1.5, 2.5, 3.5]\,\text{pe}$. +However, since the precise threshold calibration as described in \cref{sec:th_scan} is not yet possible without knowing the optimal delay, the values are estimated assuming a typical distance of \qty{15}{DACs} between photoelectron peaks. + +The required position of the pedestal is determined by doing a single threshold scan without injecting light pulses. +A zoomed in view of a pedestal transition is shown in \vref{fig:pedestals} (left). +As illustrated, the position of the pedestal is calculated by taking the point on the linear interpolated curve that matches the ratio of events above threshold of 0.5. +\Vref{fig:pedestals} (right) shows the pedestal positions of the 400k channels that are obtained in that way during the commissioning of \cframes{}~1 to 9. + +\label{sec:delayscan-lite} +\begin{figure} + \captionsetup[subfigure]{aboveskip=1pt, belowskip=12pt} %Tune space between captions and subfigures + \begin{subfigure}{0.48\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Pedestal_example} + \end{subfigure} + \hfill + \begin{subfigure}{0.51\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Pedestal_distribution} + \end{subfigure} + \caption{ + Exemplary \Scurve{} of one channel without the injection of any signal showing the pedestal transition (left). + The position of the pedestal is given by the point on the linear interpolated curve that matches the ratio of 0.5. + The distribution on the right shows the determined pedestal positions of the 400k channels within \cframes{} 1 to 9. + } + \label{fig:pedestals} +\end{figure} + + +The threshold values calculated based on an assumed photoelectron peak separation of \qty{15}{DACs} and the determined pedestal position as just described are indicated by the vertical dashed lines in the example in \cref{fig:full-delayscan-example}. +As can be seen, they are slightly off compared to the intended positions in the middle of the S-curve plateaus. +However, as noted earlier, the exact values are not relevant for this particular case. +\Cref{fig:delayscan-lite-example} shows the result of the subsequent delay scan lite for the exemplary channel. +The optimal delay is given by the maxima of the curves. + +\begin{figure} + \centering + \includegraphics[width=0.8\textwidth,trim={0 0 0 25pt},clip]{figures/commissioning/Delayscan_Lite_T3L2Q3M5} + \caption{ + Distribution of the optimal LIS delay for an exemplary ROB based on the ratio of events above the lowest threshold corresponding to about \qty{1.5}{pe}. + } + \label{fig:delayscan-lite-module} +\end{figure} + +In the same way, the best delays are determined for all channels of each \cframe{}. +\Vref{fig:delayscan-lite-module} shows an exemplary result for the \num{2048} channels of one ROB, split by the four read out fibre mats. +As expected, the two outer mats 0 and 3 show very similar optimal delays, while the values of the inner mats 1 and 2 are shifted in opposite directions. + + + +\subsection{Threshold Scans} +In principle, achieving ratios of events above threshold that are significantly larger than 0 for all channels at any delay already indicates that the channels are correctly detecting the incident photons. +However, as an additional test, full threshold scans are performed at selected LIS delays based on the results from the delay scan lite. +For the exemplary ROB shown in \cref{fig:delayscan-lite-module}, threshold scans at three different delays are required. +Typically, a handful of different settings need to be chosen to cover all channels during the commissioning of one \cframe{}. + +For each channel, the \Scurve{} at the best timing is evaluated in order to identify dead channels. +The property that is used for this purpose is the integral under the \Scurve{}, starting from the position of the pedestal. +This is illustrated in \vref{fig:integral-illustration}. +As shown in \cref{fig:full-delayscan-example}, the area under the \Scurve{} is rising with LIS delays closer to the optimum. +This is because the charge accumulated by the PACIFIC integrator increases while the light intensity, as determined by the settings of the GBLD, is constant. + +\begin{figure} + \centering + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/commissioning/Scurve_integral_illustration} + \caption{ + Illustration of the \Scurve{} integral for one channel. + The \Scurves{} with illumination of the SiPM (LIS), as well as without any signal (Pedestal) are shown. + } + \label{fig:integral-illustration} + \end{minipage} + \hfill + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/commissioning/Scurve_jumps} + \caption{ + Example of a broken PACIFIC channel showing a non-monotonous S-curve with several jumps. + } + \label{fig:scurve-jumps} + \end{minipage} +\end{figure} + +An example of a type of failure that can be identified in this commissioning step is shown in \vref{fig:scurve-jumps}. +As can be seen, the depicted \Scurves{} do not follow a monotonous course that is to be expected due to the nature of the \Scurves{} as introduced in \cref{sec:th_scan}. +Instead, they reveal several jumps along the threshold scan. +Since these occur in a similar way for both PACIFIC integrators, the error likely lies in the relation between the threshold DACs and the resulting comparator voltage level. +Due to the generation of the thresholds by the three 8-bit current DACs per channel (see \cref{sec:pacific_digitisation}), some jumps in the \Scurves{} are to be expected. +However, these mostly occur at multiples of \qty{64}{DACs} and predominantly at \qty{128}{DACs}, but not to the extend as shown in \cref{fig:scurve-jumps}. +Therefore, these types of channels are classified as broken during the commissioning. + +%Channels with jumps: +%C-Frame 4: 3 channels +%C-Frame 2: 2 channels +%C-Frame 6: 1 channel +%C-Frame 8: 1 channel + +In terms of dead channels, i.e. channels that are unable to detect the incident photons, the area under the \Scurve{} as introduced previously is considered. +\Vref{fig:integral-module} shows the \Scurve{} integral over the course of the \num{2048} channels of one fibre module. +A clear separation between the threshold scans under injected light pulses, and pedestal-only runs can be identified, indicating that the channels are working properly. +The course of the LIS curve is mainly determined by the luminosity along the \qty{13}{\cm} light bars. +Since the fibres inside the light bars are scratched manually, each one has a unique light profile. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth,trim={0 0 0 25pt},clip]{figures/commissioning/Scurve_integral_module} + \caption{ + \Scurve{} integral along the \num{2048} channels of one exemplary fibre module. + The profile is shown without injecting any signal (pedestal-only), as well as under illumination with pulsed light (LIS). + } + \label{fig:integral-module} +\end{figure} + +In summary, the distributions as shown in \vref{fig:integral-distribution} are obtained. +They show the \Scurve{} integrals for all \num{401408} channels that were examined during the commissioning of \cframes{} 1 to 9. +A total of \num{7} channels exhibit a LIS integral below 5, which has been defined as the lower limit in the course of the commissioning. +However, after closer examination, only \num{3} of these turned out to be dead channels, while the remaining 4 suffered from a low light intensity. +The cause of the malfunctions was found in the associated \num{3} SiPM channels, which were already marked as dead during the QA of the assembled SiPM arrays inside the cold boxes. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/commissioning/Scurve_integral} + \caption{ + Distributions of the \Scurve{} integrals for the 400k channels as examined during the commissioning of \cframes{} 1 to 9. + } + \label{fig:integral-distribution} +\end{figure} + +In addition to the \num{3} dead channels, \num{7} channels were identified that show similar jumps in the \Scurves{} as depicted in \cref{fig:scurve-jumps}. +In relation to the total of \num{401408} examined channels, this corresponds to a quota of \qty{2.5e-5} malfunctioning channels. + + +\subsubsection{Outlook} +Regarding the threshold scans that will need to be performed for the precise calibration of the threshold DACs during normal operation, it is expected that no preceding delay scans (lite) will be required every time. +However, this requires that the control links are provided with fixed latencies by the SOL40s. +Nevertheless, it will be indispensable to once determine the optimal LIS pulse delay by means of the presented methods. + + +\section{Commissioning Summary} +In this chapter, the commissioning of the front-end electronics of a large fraction of the \scifitracker{} has been presented. +Due to the complexity of the system (see \cref{sec:complexity}), it has been a challenging task. +This concerns in particular the commissioning of the early \cframes{} that took significantly longer because many tools had to be developed alongside the commissioning procedure itself. +It was the first time that the electronics were operated on such a large scale and at the system level along with the surrounding infrastructure. + +After overcoming the initial challenges, including the establishment of the \qty{40}{\mega\hertz} readout in conjunction with a near-final version of the upgraded LHCb DAQ system (see \cref{sec:commissioning-daq}), the commissioning procedure steadily became a smooth and routine operation. +Nevertheless, there were also a few critical failures that could only be resolved by replacing the affected ROBs. +However, due to the fact that the commissioning takes place in a dedicated hall on the surface of the LHCb site, the replacement operations were well possible. + +Overall, it could be verified that the SciFi front-end electronics generally works flawlessly and meets very high quality requirements. +This was made possible by means of a strict quality assurance (QA) before the installation of the various electronics components (see \cref{sec:qa}), as well as before mounting the individual ROBs on the \cframes{} (\cref{sec:fe-tester}). +Among other things, it could be demonstrated that, after careful tuning of the underlying clock phases, a stable data transmission way below the required bit error rate of $10^{-12}$ is achievable on a large scale consisting of a few thousand optical data links. +In addition, only a handful of channels were found to be malfunctioning out of a total of 400k detector channels tested. + + + +%\section{Internal Charge Injection} +%\subsection{Uniformity across PACIFIC channels} +%\subsubsection{Maximum charge Qmax} +%\subsubsection{Time at maximum charge Tmax} + +%\subsection{Stability of baseline, Qmax and Tmax} +%And reproducibility - across repeated measurements, power cycles, board temperatures etc. + +%\subsection{Differences of integrators} +%Fundamental! i.e. trimming + +%\subsection{Differences of comparators} +%Fundamental! + +%\subsection{Evaluation of fast threshold scan} + + +%\section{Threshold Scans} +%\label{sec:th_scans} + +%\subsection{Uniformity across channels} +%\subsubsection{Time at maximum integration Tmax} + +%\subsection{Stability of baseline and Tmax} +%And reproducibility - across repeated measurements, power cycles, board temperatures etc. + +%\subsection{Feasibility of SiPM breakdown voltage (Vbd) determination} +%Over-voltage scan + + +%\section{Sensor Readings} + +%\subsection{High-Voltage} +%\subsubsection{Achievable accuracy after calibration} +%\subsubsection{Sensitivity on board temperature} + +%\subsection{Temperature spread within different board types} + + + +%\section{Additional notes} +%FE-Tester delay scan is stored in $/calib/sf/FETester/4TSLPCEFB00055/DelayScan/20200811_19h00m22s$ diff --git a/compress_pdf.sh b/compress_pdf.sh new file mode 100755 index 0000000..ae57089 --- /dev/null +++ b/compress_pdf.sh @@ -0,0 +1,9 @@ +quality="/printer" +#Possible values are: +#/screen (screen-view-only quality, 72 dpi images) +#/ebook (low quality, 150 dpi images) +#/printer (high quality, 300 dpi images) +#/prepress (high quality, color preserving, 300 dpi imgs) +#/default (almost identical to /screen) + +gs -sDEVICE=pdfwrite -dCompatibilityLevel=1.4 -dPDFSETTINGS=$quality -dNOPAUSE -dQUIET -dBATCH -sOutputFile="build/Dissertation_Daniel_Berninghoff.pdf" build/main.pdf diff --git a/conclusion.tex b/conclusion.tex new file mode 100644 index 0000000..458e7eb --- /dev/null +++ b/conclusion.tex @@ -0,0 +1,66 @@ +\chapter{Conclusion} +\label{ch:conclusion} + +The \lhcbexperiment{} at the LHC is a specialised detector that probes the Standard Model of particle physics and theories beyond it by performing precision measurements of \textit{CP} violation and studying rare decays in the $b$ and $c$ quark sector. +During the first years of operation between 2010 and 2018, huge samples of processes involving these quarks were collected and enabled the publication of key results in the field of flavour physics. +Although the detector was already operating at twice the design luminosity towards the end of this period, many measurements are still limited by the statistical sensitivity of the data samples. +To overcome this, LHCb has undergone a major upgrade in preparation for another fivefold increase in instantaneous luminosity starting from the next data taking period in the course of 2022. +The complete tracking system has been replaced in the process, along with the front-end electronics of all sub-detectors. +The latter was required in order to enable a trigger-less readout of the complete detector at the LHC bunch crossing rate of \qty{40}{\mega\hertz}, which will in particular benefit analyses with hadronic final states. + +The Scintillating Fibre (SciFi) Tracker is an essential component in the upgraded tracking system of the \lhcbexperiment{}. +With a fibre diameter of \qty{250}{\micro\meter}, sufficient granularity is provided for the increasing track multiplicities. +In addition, the SciFi front-end electronics have been developed and optimised to enable the readout of the detector at \qty{40}{\mega\hertz}. + +During the three-year upgrade period, the 12 \cframes{} that make up the \scifitracker{} have been assembled. +While the overall (tracking) performance was already verified in previous test beam campaigns for individual fibre modules and Readout Boxes (ROBs), the following challenge was to ensure that the same quality could be maintained for the entire detector. +In case of the front-end electronics, this means that a total of \num{256} ROBs need to be thoroughly examined in their final environment. + +In the scope of this thesis, the complex system was put into operation for the first time at the level of individual \cframes{}. +It consists of up to \num{24} ROBs that need to be operated in conjunction with the surrounding infrastructure and the upgraded LHCb DAQ system. +A key challenge in this context was to establish the readout of the detector at \qty{40}{\mega\hertz}. +With several hundred optical data links per \cframe{}, data rates of up to \qty{2}{\tera\bit/\second} are generated and need to be processed. +To ensure an error-free transmission along the path of the data, this requires a careful tuning of half a dozen clock phases per connection. + +After overcoming the initial challenges, a detailed test sequence has been defined, developed and implemented. +The so-called commissioning procedure ranges from a series of basic functional tests to taking measurements that involve the complete data chain. +It is performed on each individual \cframe{} before it is released for installation in the LHCb cavern. +After a slow start and despite multiple interruptions due to the COVID-19 pandemic, the commissioning quickly became a routine operation. + +The results from the first 9 commissioned \cframes{} corresponding to \num{196} ROBs and 400k channels were presented. +Critical failures occurred in \qty{5}{\percent} of the cases and required the replacement of the corresponding ROBs. +Since the commissioning takes place in a dedicated hall on the LHCb site, this operation is significantly easier and safer than performing it after the installation of the detector in the cavern. +The most common error concerned the communication between the control system and the front-end electronics via the optical links. +At a total of \num{6} ROBs, temporary losses of the acquired frame-locks were observed. +These typically only last for a few milliseconds, but can potentially lead to unwanted resets of the front-end electronics. + +Apart from the critical errors, minor issues such as broken sensors were encountered that did not require further interventions. +This also includes a total of 3 dead and 7 malfunctioning detector channels, which were identified in the course of the commissioning. +However, in view of more than 400k channels, this translates to a rate of functional channels well above \qty{99.99}{\percent}. + +The performance studies that have been conducted alongside the commissioning confirmed the high quality of the front-end electronics. +It was demonstrated that they behave consistently and stably even with slight variations in conditions. +However, it was found that at least one additional retrimming iteration of the internal integrator baselines is required after the installation of the \cframes{} in order to achieve a uniform performance between the two PACIFIC integrators in each channel. + +Overall, the commissioning of the SciFi front-end electronics has been a great success and demonstrated its flawless functionality on a large scale. +No unsolvable issues have been encountered along the way allowing the detector to be installed in the LHCb cavern and ready to take data. +The commissioning procedure has been developed using the same software and tools as will be used in the final system. +In addition, it has been conducted in conjunction with the same hardware that implements the control and DAQ system in the upgraded \lhcbexperiment{}. +Thereby, a lot of experience has been gained that will be invaluable for the operation of the detector in the course of the next years. + + + + + + + + +%\begin{figure}[b!] +% \centering +% \includegraphics[width=1.0\textwidth]{figures/conclusion/TS_Transport} +% \caption{ +% TS-Cage with the first four commissioned \cframes{} being lowered into the LHCb cavern. +% Photo taken from Ref.~\autocite{cern-photos}. +% } +% \label{fig:ts-transport} +%\end{figure} diff --git a/fee.tex b/fee.tex new file mode 100644 index 0000000..01e64b4 --- /dev/null +++ b/fee.tex @@ -0,0 +1,952 @@ +\chapter{Front-End Electronics of the SciFi Tracker} +\label{ch:fee} + +The front-end electronics of the \scifitracker{} follow a modular design. +Each HalfROB consists of one \MB{}, four \CB{}s, and four \PB{}s. +The latter are the direct interfaces to the SiPMs. +Each \PB{} houses four custom 64-channel ASICs (Application Specific Integrated Circuits) that perform the analogue processing and digitisation of the SiPM signals. +In the next step, the \CB{}s perform a hit clustering and noise suppression on the digital pattern provided by the \PB{}s with the help of two on-board FPGAs (Field Programmable Gate Arrays). +Lastly, the clustered data is encoded and shipped to the DAQ servers via optical transmitters located on the \MB{}. +In addition, the \MB{} is responsible for distributing power, clocks and control commands among all boards within one HalfROB. +\Vref{fig:fee-datapath} shows a block diagram of one HalfROB with the indicated data stream from the SiPMs to the optical transmitters. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/FEE-Datapath} + \caption{ + Block diagram of a HalfROB with the main components on each board denoted. + The data stream is indicated by the green arrows. + The blue arrows illustrate the bidirectional optical control link. + Image edited from Ref.~\autocite{fee-design}. + } + \label{fig:fee-datapath} +\end{figure} + +Following the path of the data, the various components of the SciFi front-end electronics will be discussed in the following sections. + +\section{PACIFIC Board} +The \PB{} (PB) is a 14-layer PCB with a nominal thickness of \qty{1.6}{\milli\meter} that measures \qty{65}{\milli\meter} in length and \qty{60}{\milli\meter} in width~\autocite{pb-edms}. +It serves as the carrier board for four PACIFIC ASICs, which are responsible for the analogue processing and digitisation of the SiPM signals. +Further information on the PACIFIC chip follow in \cref{sec:pacific}. +The layout of both sides of the \PB{} is shown in \vref{fig:pb-schematic}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/PB_Schematic} + \caption{ + Layout of the front (left) and back (right) of a \PB{}. + The connectors to the SiPM flex cables are shown on the top left. + On the bottom right, the FMC connection points to the \CB{} are displayed. + The four PACIFIC ASICs are soldered on the square areas on the right. + Image edited from Ref.~\autocite{pb-edms}. + } + \label{fig:pb-schematic} +\end{figure} + +Besides from housing the PACIFIC ASICs, four 80-pins, \qty{0.5}{\milli\meter} pitch connectors\footnote{DF12(3.0)-80DS-0.5V by Hirose Electric Co., Ltd.} are located on the board. +They are used to connect two SiPM flex cables, which hold two female counterparts of these connectors on each cable (see \vref{fig:sipm-zoom}). +On each connector, 64 pins are used for the 64 channels of one SiPM die. +The remaining pins are connected to the bias voltage and ground. +In addition, for each connector pair, one line goes to the Pt1000 temperature sensor located on the backside of the SiPM arrays. +Thereby, a total of 256 SiPM channels are operated by one \PB{}. + +The analogue SiPM signals are directed to the PACIFIC ASICs. +From there, the digital output is forwarded to a high-speed, 400-pin FMC (FPGA Mezzanine Card) connector\footnote{ASP-134602-01 (HPC) by Samtec, Inc.} that allows for the connection to the \CB{}. + +Besides from being responsible for the routing of the signals, the \PB{} contains several monitoring circuits. +Two Pt1000 temperature sensors\footnote{Pt1000 SMD 0805 Class B by Heraeus Nexensos GmbH} are located between the four ASICs and the FMC connector on the backside of the board. +They are denoted as R10 and R21 on the right side of \vref{fig:pb-schematic}. +The readout is performed by an ADC (Analogue-to-Digital Converter) located on the \CB{} (see \cref{sec:cb}). +A monitoring of the bias voltages applied to the SiPM dies is enabled by four voltage divider circuits. +%They are required to produce an output voltage that lies in the range [$0, 1$]$\,\unit{\volt}$ of the ADC -- in contrast to typical bias voltages between \qtyrange[range-phrase={ and }]{50}{60}{\volt}. +The involved resistors are located next to the SiPM connectors and are denoted as R1-R9 and R11-R13 in \vref{fig:pb-schematic}. + +Each \PB{} is assigned a unique 48-bit serial number that is stored on a 1-Wire serial ID device\footnote{DS2401P+ by Maxim Integrated}. + + + +\section{PACIFIC ASIC} +\label{sec:pacific} + +The PACIFIC is a low-power ASIC specifically designed for the \scifitracker{}. +This is also reflected by the acronym PACIFIC that stands for low-\textbf{\underline{p}}ower \textbf{\underline{A}}SIC for the S\textbf{\underline{ci}}ntillating \textbf{\underline{Fi}}bre Tra\textbf{\underline{c}}ker. +The chip allows for the readout of 64 SiPM channels and was developed using TSMC's\footnote{Taiwan Semiconductor Manufacturing Company, Limited, Hsinchu, Taiwan} \qty{130}{\nano\meter} CMOS technology. +It is designed to be radiation tolerant and operate at the LHC clock frequency of \qty{40}{\mega\hertz} with a power consumption of less than \qty{10}{\milli\watt} per channel~\autocite{pacific-paper}. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/fee/PACIFIC_Blocks} + \caption{ + Logical structure of the PACIFIC ASIC. + Image adapted from Ref.~\autocite{pacific-paper-albert}. + } + \label{fig:pacific-blocks} +\end{figure} + + +As shown in \vref{fig:pacific-blocks}, the PACIFIC consists of various logical blocks that are presented in the following. + +\subsection{Signal Processing and Digitisation} +\label{sec:pacific_processing} +A block diagram of one channel of the PACIFIC ASIC is shown in \vref{fig:pacific-channel}. +The analogue processing and digitisation of the SiPM signal can be divided into five successive stages that are discussed in the following. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/PACIFIC_Channel} + \caption{ + Channel block diagram of the PACIFIC ASIC. + Each channel consists of five stages in which the analogue SiPM signal is processed and digitised. + Image taken from Ref.~\autocite{pacific-paper}. + } + \label{fig:pacific-channel} +\end{figure} + + +\subsubsection{Pre-amplification} +\label{sec:pacific_preamp} +The first stage of the signal processing chain is the pre-amplification, or input stage. +It is directly connected to the anode of the SiPM and provides a current mode input with a low impedance and high bandwidth of about \qty{50}{\ohm} and \qty{250}{\mega\hertz}, respectively~\autocite{pacific-datasheet}. + +\begin{figure} + \centering + \includegraphics[width=0.8\textwidth]{figures/fee/PACIFIC_Voffset} + \caption{ + Anode voltage generation circuit within the PACIFIC. + Each channel can be connected independently to the output voltages $V_0$ to $V_{15}$. + %With a typical reference voltage $V_\text{REF} = \qty{500}{\milli\volt}$, this circuit allows for step sizes of \qty{40}{\milli\volt}. + Image adapted from Ref.~\autocite{pacific-datasheet}. + } + \label{fig:pacific-voffset} +\end{figure} + +The input stage consists of a current conveyer based on a novel approach using two feedback loops~\autocite{albert-diss}. +It allows for the selection of four different gains, as well as the possibility to modify the bias voltage of each individual channel over a range of \qty{600}{\milli\volt}. +This is achieved by the implementation of the voltage divider chain as shown in \vref{fig:pacific-voffset} that produces voltages +\begin{equation} + % V_x = \frac{3}{25} \cdot 2 V_\text{REF} + \frac{x}{25} \cdot 2 V_\text{REF} = \frac{2}{25}V_\text{REF}(x+3) + V_x = \frac{R_x}{R_\text{tot}}\cdot 2 V_\text{REF} = \frac{(x+3)R}{25R}\cdot 2 V_\text{REF} = \frac{2}{25}V_\text{REF}(x+3) +\end{equation} +at the different outputs $V_x$. +With a typical reference voltage $V_\text{REF} = \qty{500}{\milli\volt}$, the bias voltage can be fine tuned in \qty{40}{\milli\volt} steps, which corresponds to a change in gain by about \qty{1}{\percent} around the nominal overvoltage $\OV{} = \qty{3.5}{\volt}$ as derived in \vref{eq:sipm-gain}. +Each channel can be connected independently to the output voltages $V_0$ to $V_{15}$ as determined by four control bits in the channel configuration registers (see \cref{sec:pacific_regs}). + +The current conveyer is followed by a closed-loop transimpedance amplifier. +It converts the current signal coming from the SiPM to a voltage signal that is used for further processing. +As indicated in \vref{fig:pacific-channel}, three extra debug (DBG) pins are included in the design that give access to different stages in the analogue signal processing. +An internal multiplexer is used to select the channel to be tested. +\Vref{fig:pacific-preamp-shaper} (left) shows the typical debug output of the pre-amplification stage. +The signals on the oscilloscope are generated by illuminating the SiPMs with short light pulses (see \cref{sec:lis} for further details). +A band structure is visible at early times corresponding to different numbers of pixels with triggered avalanches. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/PACIFIC_Preamp_Shaper} + \caption{ + PACIFIC pre-amplifier (left) and shaper (right) output. Images adapted from Ref.~\autocite{pacific-paper-albert}. + } + \label{fig:pacific-preamp-shaper} +\end{figure} + +\subsubsection{Shaping} +\label{sec:pacific_shaper} +As can be seen at the output of the pre-amplification stage in \vref{fig:pacific-preamp-shaper} (left), the signals extend over several \qty{25}{\nano\second} LHC clock cycle periods. +This is mainly due to the recovery time of the SiPM pixels as discussed in \cref{sec:sipm} and would lead to unwanted spillover into the following bunch crossing intervals. +Therefore, a shaper is used within the PACIFIC to suppress the exponential tail of the signal. +It is based on a pole-zero cancellation circuit as shown in \cref{fig:pacific-polezero}. +The impedance between the two nodes is given by +\begin{equation} + Z(\omega) = \left(\frac{1}{R_\text{PZ1}} + i\omega C_\text{PZ1}\right)^{-1} = \frac{R_\text{PZ1}}{1+i\omega C_\text{PZ1}R_\text{PZ1}} +\end{equation} +which has a pole at +\begin{equation} + \omega = \frac{i}{C_\text{PZ1}R_\text{PZ1}} \equiv \frac{i}{\tau_\text{PZ1}}\,. +\end{equation} +The time constant $\tau_\text{PZ1}$ thereby determines the fall time of the shaper output. +It can be tuned by modifying the resistor $R_\text{PZ1}$ and capacitor $C_\text{PZ1}$ within the circuit, which is enabled through dedicated control bits in the configuration registers (see \cref{sec:pacific_regs}). + +Typical output signals of the shaping stage as seen on the oscilloscope are shown in \vref{fig:pacific-preamp-shaper} (right). +Compared to the pre-amplifier output, the fall time is reduced significantly allowing the signal to be fully integrated in the following stage. + +\begin{figure} + \centering + \begin{minipage}[c]{0.33\textwidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/PACIFIC_Polezero} + \caption{ + Pole-zero cancellation circuit as used in the shaping stage of the \mbox{PACIFIC} channels. + } + \label{fig:pacific-polezero} + \end{minipage} + \hfill + \begin{minipage}[c]{0.63\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/fee/PACIFIC_TH_Circuit} + \caption{ + Schematics of the track and hold stage of the \mbox{PACIFIC} channels. + } + \label{fig:pacific-th-circuit} + \end{minipage} +\end{figure} + +\subsubsection{Integration} +\label{sec:pacific_integration} +The amplified and shaped signal is integrated in each \qty{40}{\mega\hertz} clock cycle in order to accommodate for variations in the photon arrival time due to the decay and travel time in the scintillating fibres. +The implementation uses two gated integrators. +They integrate the signals in an interleaved manner at half the system clock frequency (\qty{20}{\mega\hertz}). +This means that while one integrator is in use, the remaining one is being reset. +This structure allows for a reduction of the dead time to a minimum. + +It is of crucial importance that the two integrators have similar properties to ensure the same performance in even and odd bunch crossing numbers corresponding to the different integrators. +However, due to manufacturing tolerances, especially the DC baselines can show significant differences. +The DC baseline refers to the integrator output level in the absence of an input pulse. +Since any additional signal is added to it, it is also commonly designated as pedestal. +A correction mechanism is foreseen that allows for the adjustment of the reference voltage of each integrator thus effectively shifting the baseline. +It can be tuned by means of a 4-bit current output DAC (Digital-to-Analogue Converter) that can feed current in both directions. +This enables the reference voltage of each integrator to take 31 different values, which are controlled through dedicated control bits in the configuration registers (see \cref{sec:pacific_regs}). +The alignment of the DC baselines of the two integrators is also referred to as trimming and is explained in detail in \cref{sec:trimming}. + + +\subsubsection{Track and Hold} +The integrators are followed by a dual passive track and hold stage that stabilises and merges the signals from the two integrators for the subsequent digitisation step. +As shown in the schematics in \vref{fig:pacific-th-circuit}, it is based on two capacitors $C_{1,2}$ and several switches that are operating in synchronous with the previous stage. +Similar to the integrators, the switching is performed in an interleaved manner using the clock $\text{clk}$ and its inverted $\overbar{\text{clk}}$ at a frequency of \qty{20}{\mega\hertz}. +While integrator 1 is in use, its output $V_\text{int1}$ is connected to the capacitor $C_1$, but disconnected from the common track and hold output $V_\text{out}$. +At the same time, the capacitor $C_2$ is connected to $V_\text{out}$, but disconnected from integrator 2. +After \qty{25}{\nano\second}, the situation is reversed such that $C_2$ is connected to the integrator output $V_\text{int2}$. + +In previous prototypes of the PACIFIC ASIC, the capacitors were directly connected to ground. +However, it was found that this design leads to a non-negligible amount of charge sharing in the order of \qty{25}{\percent} between the two capacitors because they are connected to each other for a brief moment during the switching process. +For an unirradiated detector, this resulted in \qty{60}{\percent} of fake hits in the bunch crossing after the detection of a signal at the same position. +The implementation of the track and hold stage was identified as a major contribution to this effect. +The redesigned schematic includes two additional switches driven by the clocks $\text{clk1}$ and $\text{clk2}$ as shown in \vref{fig:pacific-th-circuit}. +At the moment of the switching, they disconnect the capacitor that is currently not in use for a short period ($<\qty{1}{\nano\second}$). +In addition, the interleaved switching procedure as just described is slightly shifted with respect to each other to decouple the two capacitors even further. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/fee/PACIFIC_TH_Output} + \caption{ + Typical output of the track and hold stage of the PACIFIC channels. + The distribution on the left represents the pulse height projection of the signals within the brown rectangle in logarithmic scale. + } + \label{fig:pacific-th-output} +\end{figure} + + +The typical output of the track and hold stage is shown in \vref{fig:pacific-th-output}. +Note that the signals are going in negative direction since the gated integrators are using an inverted structure. +The pulse height projection of the signals included in the oscilloscope image illustrates the clear peaking structure corresponding to different numbers of photoelectrons. +Unlike the debug output of the pre-amplifier or shaper (\vref{fig:pacific-preamp-shaper}), the output of the track and hold stage strongly depends on the timing of the pulsed light with respect to the system clock. +The delay needs to be tuned carefully such that the signals can be fully integrated in the previous stage. +At the optimal timing, the distance between the photoelectron peaks is maximised. +This aspect is explained in more detail in \cref{sec:lis-tests}. + + +\subsubsection{Digitisation} +\label{sec:pacific_digitisation} +The last stage of the signal processing in the PACIFIC channels is the digitisation stage. +The analogue SiPM signals processed in the previous steps are digitised by means of three PMOS comparators that act as a simple non-linear flash ADC~\autocite{pacific-paper}. +They feature a mean hysteresis of about $\qty{10}{\milli\volt}$ to avoid repetitive switching at the output when the signal level is close to the set threshold~\autocite{pacific-presentation-herve}. +The comparator thresholds are provided by three independent 8-bit current DACs included in each channel. +The generated currents are injected into a \qty{\approx 50}{\kilo\ohm} resistor allowing for voltages between ground and \qty{760}{\milli\volt}~\autocite{pacific-datasheet}. +In the default configuration, one threshold DAC step corresponds to about \qty{2.5}{\milli\volt}. + +Due to the discrete SiPM signal amplitudes depending on the number of activated pixels (see \cref{sec:sipm}), having a larger granularity ADC offers little added value, while only consuming a higher bandwidth. +On the other hand, the independently adjustable thresholds provide the flexibility to efficiently digitise the signals in preparation for the following processing steps. +However, the disadvantage of this design is that appropriate thresholds must be set prior to taking data. +The calibration procedure required for this is described in \cref{sec:th_scan}. + +Besides from the three threshold DACs in each individual channel, the PACIFIC ASIC features an additional set of threshold DACs that are common to all channels. +In the following, the latter are referred to as common thresholds, while the individual threshold DACs are called local thresholds. +As illustrated in \vref{fig:pacific-channel}, a switch is included in each channel that allows for the selection of the different sets of thresholds. +During the design phase of the chip, it was intended to primarily use the common thresholds. +While this allows for an easier handling, it requires that all 64 channels in each chip have a high uniformity in terms of gain and DC baselines. +However, it was found that especially the DC baselines show large variations that can not always be corrected by means of the trimming mechanism described earlier. +Therefore, the local threshold DACs became the standard when operating the detector. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/PACIFIC_DAC_OffsetSlope_Control} + \caption{ + Relationship between the digital input value and the output voltage of a PACIFIC threshold DAC. + In addition, the effect of the slope (left) and offset (right) control is illustrated. + Images adapted from Ref.~\autocite{pacific-datasheet}. + } + \label{fig:pacific-offset-slope-control} +\end{figure} + +A circuit is implemented that allows for the adjustment of the range and granularity of the threshold DACs. +The slope can be modified by adding or removing current to the DACs' current reference. +A similar mechanism is foreseen at the output of the DACs, just before the resistor that performs the conversion to a voltage. +By adding a certain amount of current at this point, the offset can be tuned. +The slope and offset adjustment is applied to all threshold DACs (common and local) at the same time. +Both variables are controlled by 4 bits in the configuration registers each. +An additional bit determines the sign of the slope adjustment. + +The relation between the set threshold DAC input value and the output voltage is shown in \vref{fig:pacific-offset-slope-control}. +In addition, it demonstrates the effect of the slope and offset adjustment. + +The output of each PACIFIC channel is a 3-bit pattern at \qty{40}{\mega\hertz} corresponding to whether ($1$) or not ($0$) the signal amplitude exceeds the thresholds of the three comparators. + + + +\subsection{Serialisation} +\label{sec:pacific_ser} +A fast serialiser block follows the PACIFIC channels and enables the data transmission to the \CB{}. +The complete serialisation procedure is illustrated in the digital timing diagram in \vref{fig:pacific-serialiser}. +Its operation relies on a \qty{320}{\mega\hertz} master clock (denoted as CLKout in the diagram). +Based on this clock, the \qty{40}{\mega\hertz} (CLKin), as well as the two complementary \qty{20}{\mega\hertz} clocks required for the analogue processing and digitisation are generated. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/PACIFIC_Serialiser} + \caption{ + Digital timing diagram of the PACIFIC serialiser during normal operation. + The $x$-axis is labelled in units of the \qty{320}{\mega\hertz} clock period (CLKout) that determines the output data stream. + Image taken from Ref.~\autocite{pacific-datasheet}. + } + \label{fig:pacific-serialiser} +\end{figure} + +In the first step of the serialisation, the output of the three comparators of each PACIFIC channel is sampled at the rising edge of the \qty{40}{\mega\hertz} clock. +The outputs of four neighbouring channels are thereby written into a 12-bit internal register (intReg). +To stay within the available bandwidth, a simple compression is performed in which the 3 bits of each channel are arithmetically added to form a 2-bit integer that represents the number of comparators whose threshold levels were exceeded by the signal amplitude. +Assuming a strict hierarchy and proper functioning of the comparators, no information is lost in the process. +With the help of an internal shift register (shiftReg), the compressed data (ePortIn) is output sequentially over a differential link at the rising edge of the \qty{320}{\mega\hertz} clock (outData) +Each chip comprises 16 differential outputs to cover the total of 64 channels, resulting in a data rate of \qty{5.12}{\giga\bit/\second}. + +Furthermore, an additional input signal that is referred to as SYNC is shown in the diagram. +As the name suggests, it is responsible for synchronising the total of \num{8192} PACIFIC ASICs installed in the \scifitracker{}. +It is evaluated at the rising edge of the \qty{320}{\mega\hertz} and triggers a reset of the state machine in the clock generator upon arrival. +Thereby, it ensures that the slower \qty{40}{\mega\hertz} and \qty{20}{\mega\hertz} clocks are generated simultaneously in the various chips at a predetermined time. + + + +\subsection{Slow Control Interface and Configuration Registers} +\label{sec:pacific_regs} +The PACIFIC features a slow control interface that is based on standard 10-bit addressing \IIC{}~\autocite{i2c-specification}. +Efficient reading and writing of larger amounts of continuous data is enabled by automatic incrementation of the target address without the need to repeat the 2-byte preamble for every transmitted byte of data. + +\begin{table} + \centering + \caption{Digital input and output signals of the PACIFIC that interact with the slow control and register blocks.} + \label{tab:pacific_io_signals} + \begin{tabular}{@{}llll@{}} + \toprule + Signal & Type & Logic & Description \\ \midrule + RESET & Input & Active low & Global digital reset \\ + DISACLK & Input & Active low & Disables \IIC{} clock \\ + LDINIT & Input & Active low & Loads initial register values \\ + ERROR1 & Output & Active high & Hamming code detected single bit-flip \\ + ERRORM & Output & Active high & Hamming code detected multiple bit-flips \\ + ERROR1GEN & Input & Active low & Forces single bit-flips for debugging \\ + REFRESH & Input & Active low & Clears error flags ERROR1 \& ERRORM \\ \bottomrule + \end{tabular} +\end{table} + +The 10-bit address space is required to allow addressing a total of \num{340} logical registers. +Of these, \num{336} read/write registers contain the configuration parameters of the chip. +The additional four are read-only and allow for the monitoring of internal ADC readings and error detection counters. +The registers are logically organised in groups of \num{8} bits resulting in a total of \num{2688} control bits of which \num{2683} are actually in use. + +A small fraction of the configuration registers apply to all the \num{64} channels of the PACIFIC. +It includes the parameters for the common bias block and controls, among others, the slope and offset adjustment of the threshold DACs, the pole-zero cancellation parameters, as well as the DAC values of the common thresholds themselves. +This functionality is covered by \num{107} control bits within \num{14} registers. +An additional \num{80} control bits (\num{10} registers) are used for debugging purposes like controlling an internal channel multiplexer to measure the various stages of the analogue processing chain with an oscilloscope as shown in \cref{sec:pacific_processing}. + +By far the largest fraction of the configuration registers determines the behaviour of the individual \num{64} channels. +This includes the SiPM bias voltage offset (4~bits) and trimming of the reference voltages of the two integrators (10~bits). +Additionally, the local 8-bit threshold DACs of the three comparators can be selected (1~bit) and adjusted (\numproduct{3 x 8}~bits). +Thereby, \num{39} control bits are required for each PACIFIC channel, resulting in a total of \num{2496} bits, which are logically organised in blocks of eight channels. + +Protection against erroneous state changes of the control bits due to ionising radiation (single event upset, SEU) is provided by a Hamming encoding algorithm~\autocite{hamming}. +Each configuration register is split into two 4-bit blocks that are covered by an extended Hamming(7,4) code with an additional parity bit. +Thereby, every 4~bits of data are protected by 4 additional parity bits that allow to detect state changes in up to 3~bits. +Additionally, it can distinguish between errors in single or multiple bits. +While single bit-flips can be corrected on the fly, the configuration has to be rewritten in case of multiple bit-flips. +Both types of errors are counted and stored in two of the four read-only registers mentioned before. + +A complete list of the configuration registers is given in the PACIFIC data sheet~\autocite{pacific-datasheet}. +In addition, the PACIFIC features several digital input and output signals that interact with them. +They are summarised in \vref{tab:pacific_io_signals}. + +\subsection{Threshold Scan} +\label{sec:th_scan} +Since each PACIFIC channel only features a set of three adjustable comparators, the full SiPM photoelectron spectrum as can be seen with a high-resolution ADC can not be resolved. +However, the determination of the amplitudes corresponding to different numbers of generated photoelectrons (pe) is required to set appropriate thresholds for the operation of the detector. +This process is also referred to as PACIFIC calibration. + +Despite the lack of a full ADC, the position of the photoelectron peaks can also be estimated by scanning the threshold DAC counts (hereinafter referred to as DACs) over their entire dynamic range. +In each step, several thousand events are recorded and the ratio of events above threshold is determined. +At the same time, the SiPM channels are illuminated with pulsed light with the help of the light injection system, which is further described in \cref{sec:lis}. + +The result of such a threshold scan is an integrated spectrum as shown in \vref{fig:scurve-fit}. +Due to the shape of the curve, it is often referred to as S-curve. +In order to determine the peak positions of the underlying spectrum, a dedicated calibration tool has been developed~\autocite{lukas-thesis}. +It is based on modeling the spectrum of photoelectron peaks $k$ by a sum of Gaussian functions +\begin{equation} + N(x) = \sum_{k\ge0} A_k \cdot \frac{1}{\sqrt{2\pi\sigma_k^2}} \cdot \exp\left(-\frac{(x-p_k)^2}{2\sigma_k^2}\right) +\end{equation} +with amplitudes $A_k$, means $p_k$ and widths $\sigma_k$~\autocite{sipm-model}. +The width of the first peak $\sigma_0$, corresponding to the channel baseline or pedestal, is determined by the electronic noise, while subsequent peaks are additionally widened due to slight variations $\sigma_1$ between pixels +\begin{equation} + \sigma_k^2 = \sigma_0^2 + k \cdot \sigma_1^2\,. + \label{eq:peak-widths} +\end{equation} +The amplitudes $A_k$ are primarily dependant on the light intensity $\mu$ that describes the mean number of photons within a Poisson distribution. +However, due to pixel crosstalk $\lambda$ (see \cref{sec:sipm}), it is modified to the so-called Generalised Poisson distribution~\autocite{generalised-poisson} +\begin{equation} + A_k(\mu, \lambda) = \frac{\mu\cdot(\mu+k\cdot\lambda)^{k-1}\cdot \text{exp}(-\mu-k\cdot\lambda)}{k!}\,. +\end{equation} +When performing the threshold scan as described previously, the course of the S-curve is given by the complementary cumulative distribution function of $N(x)$ +\begin{equation} + S(x) = \text{P}(X > x) = \int_x^{\infty} N(x')\,\text{d}x' = 1 - \sum_{k\ge0} A_k(\mu, \lambda) \cdot \frac{1}{2} \left[1+\text{erf}\left(\frac{x-p_k}{\sigma_k \sqrt{2}}\right)\right]\,. +\end{equation} +Ideally, the peak positions $p_k$ have the same distance to each other, which is hereinafter referred to as photoelectron peak separation. +It is determined by the gain of the SiPM as well as the analogue processing chain in the PACIFIC. +Since the photoelectron peaks become only visible by means of the threshold scans, they are stated in units of threshold DACs in the following. +As can be seen in \vref{fig:scurve-fit}, the separation between the peak positions $p_k$ is not constant, which is due to non-linearities in the PACIFIC channels. +Therefore, the positions of the first six peaks are determined individually when performing the fits of the S-curves. +Along with the light intensity $\mu$, crosstalk probability $\lambda$, and the two width parameters $\sigma_0$ and $\sigma_1$, a total of 10 free parameters are used in the fit of a single \Scurve{}. + +\begin{figure} + \centering + \includegraphics[width=0.75\textwidth]{figures/fee/ScurveFit} + \caption{ + SiPM photoelectron spectrum and corresponding data (\Scurve{}) as determined by a \mbox{PACIFIC} threshold scan. + Image adapted from Ref.~\autocite{lukas-poster}. + } + \label{fig:scurve-fit} +\end{figure} + +Based on the obtained parameter values, the threshold DAC settings of the three comparators per PACIFIC channel are calibrated. +The default operating thresholds are set to be in the middle of the determined positions of the 1st, 2nd, 3rd and 4th photoelectron peak, also referred to as $[1.5, 2.5, 3.5]\,\text{pe}$. +Thereby, in terms of the recorded S-curves, the thresholds are tuned to be in the middle of the plateaus, i.e. the regions where the ratio stays constant over a few DACs. +With a typical photoelectron peak separation of \qty{15}{DACs} and peak width parameters $\sigma_{0,1} \approx \qty{1}{DACs}$, the width of the \qty{1.5}{pe} plateau is about \qty{10}{DACs}, which corresponds to the margin of error in the determination of the threshold. +Due to the variations in the SiPM pixels, the peaks are widened with increasing numbers of photoelectrons according to \cref{eq:peak-widths} thus reducing the width of the plateaus. + +However, the peak separation of \qty{15}{DACs} is only achieved in the case where the SiPM signals are fully integrated by the PACIFIC channels. +For non-optimal timings, the charge accumulated by the PACIFIC integrators is reduced resulting in squashed S-curves in the horizontal direction. +On the other hand, the plateau heights are determined by the light intensity, which has to be low enough to be able to locate the pedestal position, but large enough in order to identify the higher order photoelectron peaks. +Light intensities corresponding to mean number of detected photons $\mu$ between 1 and 2 have been found to be optimal. + +Technically the scan procedure is complicated: +A separate threshold scan is required for each of the three comparators, resulting in a total of \num{768} steps per channel. +This is because the output of the PACIFIC is encoded in 2 bits per channel (see \cref{sec:pacific_ser}). +Thereby, only the number of exceeded comparator threshold levels are kept, while the information about the individual comparator response is lost. +Therefore, while scanning one comparator, the thresholds of the remaining two are set to the maximum value (\qty{256}{DACs}). +This provides sensitivity to a single comparator, as any change in output can be traced back to the currently scanned comparator. + + +\section{Cluster Board} +\label{sec:cb} + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/fee/CB} + \caption{ + Close-up view of a \CB{} mounted on the bottom side of a \MB{}. + The connection to the \PB{} on the left can be established through the black FMC connector. + } + \label{fig:cb} +\end{figure} + +The \CB{} (CB) forms the bridge between the PACIFIC and \MB{}. +With \qty{60}{\milli\meter} it matches the same width as the \PB{}, despite being about \qty{35}{\percent} longer. +A close-up photograph of a \CB{} mounted on the backside of a \MB{} is shown in \vref{fig:cb}. +It also displays the black 400-pin FMC connector that is used to establish the connection to the \PB{}. +The same connector type is used for mounting on the \MB{}. + +The main components of the \CB{} are two FPGAs located on the bottom of the PCB. +They perform the hit reconstruction and noise suppression based on the digitised signals provided by the PACIFIC ASICs. +The FPGAs, as well as the ASICs on the associated \PB{}, are controlled by a dedicated slow control chip that will be discussed shortly. + +Similar to the \PB{}, each \CB{} is equipped with three Pt1000 sensors to allow the monitoring of the temperatures on the PCB. + + + +\subsection{Cluster SCA} +\label{sec:cluster-sca} +A CERN GBT-SCA chip~\autocite{gbt-sca} is used as the Slow Control Adapter (SCA) on the \CB{}. +It provides the interface to control and monitor the various front-end electronics components. +The GigaBit Transceiver (GBT) project was founded to address the challenges of growing beam intensities and radiation doses at the LHC. +The GBT-SCA, built in commercial \qty{130}{\nm} CMOS technology, is part of a series of ASICs that were designed in this context to implement a radiation-hard bidirectional \qty{4.8}{\giga\bit/s} optical fibre link between the front- and back-end electronics~\autocite{gbt-project}. + +As an universally applicable chip for the LHCb detector, the GBT-SCA supports various control buses that are commonly used in High Energy Physics (HEP). +These include one Serial Peripheral Interface (SPI) master, one JTAG master, 16 independent \IIC{} masters, and 32 general-purpose input/output (GPIO) pins. +In addition, it provides 31 analogue inputs that are multiplexed to a pre-calibrated 12-bit ADC covering the range between \qtyrange[range-phrase={ and }]{0}{1}{\volt}. +Each input features a switchable \qty{100}{\micro\ampere} current source that allows for the operation of externally connected resistance thermometers. +One additional input is internally connected to an embedded temperature sensor. +Conversely, four 8-bit DACs are available that can provide voltages between \qtyrange[range-phrase={ and }]{0}{1}{\volt} on four different analogue output ports~\autocite{gbt-sca-manual}. + +Besides from providing the interface to the various supported control buses, the GBT-SCA features three 8-bit control registers itself. +With the help of the 24 available control bits in these registers, the channels that are not in use in a specific application can be disabled to reduce the overall power consumption. +The 16 \IIC{} master interfaces can be switched independently. +Four additional control bits allow to turn off or on the SPI and JTAG interface, as well as the ADC and GPIO pins, leaving four reserve bits unused. +Initially, all control registers start-up with 0x00, which means that all control buses are deactivated by default. +An additional 24-bit read-only register contains a unique ID that is written on internal electronic fuses during the production and testing of the SCA chip. + +\subsubsection{Application on the Cluster Board} + +The Cluster (Board) SCA utilises six of the available \IIC{} masters. +Since the \PB{} does not have its own SCA, four of these are used for the communication with the \IIC{} slaves of the four associated PACIFIC ASICs. +The remaining two channels control the two FPGAs located on the \CB{}. + +The JTAG master interface is connected to both FPGAs in a daisy chained manner according to IEEE 1149.1 Standard~\autocite{jtag-standard}. +It is thereby possible to re-program the FPGAs, as well as performing boundary scan tests. +Alternatively, re-programming of the FPGAs is also possible through the available SPI interface that is connected as a reserve. + +Of the available 31 analogue ADC inputs, 11 are in use. +They are connected to the Pt1000 temperature sensors on the \CB{}~(3 sensors), the associated \PB{}~(2), as well as on the backside of the two connected SiPM arrays~(2). +Hence, the \qty{100}{\micro\ampere} current source is enabled for these channels to allow for the measurement of the temperature dependent resistance. +The remaining four ADC lines are used for monitoring of the bias voltages of the individual SiPM dies. + +In contrast to the ADC inputs, almost all 32 available GPIO pins are utilised in the application of the Cluster SCA. +With the exception of ERROR1GEN, all digital PACIFIC input and output signals listed in \vref{tab:pacific_io_signals} are covered. +With four PACIFIC ASICs associated to each Cluster SCA, this results in a total of 24 occupied GPIO pins. +Another six lines are divided across both FPGAs for performing different types of resets. +The last used pin drives the JTAG reset signal (TRST) leaving only one vacant GPIO pin. + + + +\subsection{Cluster FPGA} +\label{sec:cluster-fpga} + +Two radiation tolerant IGLOO2 FPGAs\footnote{IGLOO2 FPGA M2GL090T-FGG484 by Microsemi} provide the key functionality of the \CB{}. +The flash-based FPGAs are built in \qty{65}{\nano\meter} technology and come in a 484-ball BGA (Ball Grid Array) package for mounting on the bottom side of the board~\autocite{clusterboard-manual}. + +They perform the hit reconstruction on the digitised SiPM signals received by the PACIFICs, and prepare the data for transmission over the optical links to the DAQ system at the back-end. +Both FPGAs are operating based on an identical firmware that can be loaded through the JTAG or SPI interface of the Cluster SCA as described previously. +However, a subtle distinction is made at one pin that is pulled to \qty{1.5}{\volt} for one FPGA, while being connected to ground for the other. +Within the firmware, this information is used to determine the position on the \CB{}, which is required for locating the origin of the data at the back-end. +Further details are given in \cref{sec:fibre-mapping}. + +Each FPGA processes the information from one SiPM array (128~channels) that is readout by two PACIFICs (64~channels each). +With 16 differential outputs per PACIFIC as discussed in \cref{sec:pacific_ser}, this corresponds to a total of 32 FPGA data input lines. + +In the first step, the incoming PACIFIC data stream needs to be deserialised. +The block in the FPGA that is responsible for that task operates at a clock frequency of \qty{160}{\mega\hertz}. +In order to cope with the input rate of \qty{320}{\mega\bit/\second} per line, it samples the data at both the rising and falling edge of the clock, which is commonly referred to as Double Data Rate (DDR). + + +\subsubsection{Clustering} +\label{sec:clustering} +The next processing stage is the clustering block that operates at the general clock frequency of \qty{40}{\mega\hertz}. +It is used to compress the data before transmission over the optical links by reconstructing hit positions while removing noise and redundant zeros (zero suppression). + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/Clustering} + \caption{ + Illustration of the clustering algorithm. + The height of each rectangle at the top depicts the SiPM signal amplitude in one channel. + The 2-bit patterns below represent the outputs of the PACIFIC channels after applying the three comparator thresholds. + Five clusters are identified by the algorithm as indicated by the green and red colors depending on the fulfilled condition. + %Grey rectangles correspond to channels which are not part of a formed cluster. + } + \label{fig:clustering} +\end{figure} + + +The hit finding and clustering algorithm follows a similar logic as the procedure to form clusters of VELO hits before the LHCb upgrade~\autocite{guido-diss}. +It is based on the three comparator thresholds in each PACIFIC channel (see \cref{sec:pacific_digitisation}). +They are named following their function within the clustering procedure: + +\begin{itemize} + \item \textbf{Seed threshold:} + The seed threshold is set to a medium level. + It marks the starting point for every potential cluster. + Depending on the signal amplitude within the channel, as well as the output of the neighbouring channels, it is discarded or becomes an actual cluster. + \item \textbf{Neighbour threshold:} + The neighbour threshold is set to the lowest level of the three. + Starting from the channel that exceeds the seed threshold, the cluster algorithm scans the adjacent channels for signal amplitudes above (at least) the neighbour threshold. + This process continues in both directions until no more channels exceeding the neighbour threshold are found. + At least one adjacent channel above the neighbour threshold is required for a potential cluster to become an actual cluster. + All the channels that were collected along the way are considered to be part of the cluster. + \item \textbf{High threshold:} + The high threshold is set to the highest level of the three. + If the signal amplitude not only exceeds the seed, but also the high threshold, it is considered an actual cluster. + In this case, it is irrelevant whether there are adjacent channels above the neighbour threshold. +\end{itemize} +The clustering algorithm is illustrated in \vref{fig:clustering}. +To achieve a sufficient compression of the data, only the positions of formed clusters are transmitted over the optical links. +The position of a cluster $\bar{x}$ is calculated as the weighted arithmetic mean +\begin{equation} + \bar{x} = \left. \sum\limits_{i=1}^n w_i x_i \middle/ \sum\limits_{i=1}^n w_i \right. +\end{equation} +with the involved channel indices $x_i$ and corresponding weights $w_i$ that depend on the exceeded threshold values. + +However, the weighted mean is only used for clusters that involve up to four channels. +Larger clusters are internally split into multiple fragments. +Once one fragment contains four channels, a new fragment is created. +These types of clusters are flagged and two positions are transmitted: the (unweighted) arithmetic mean of the first and the last cluster fragment. +With a mean cluster size of \num{2.5}, up to \qty{10}{\percent} of the clusters involve four or more channels. +Hits of particles that are relevant for physics analyses mostly involve only up to four channels, while larger clusters typically originate from (secondary) particles at high angles, noise, or delta rays. +To avoid biases in the position due to these effects, the distinction between large and small clusters is made~\autocite{clustering-note}. + + +\subsubsection{Data Format} +\label{sec:dataformat} + +\begin{table} + \centering + \caption{ + General data format as used in the \scifitracker{}. + It consists of a 20-bit header along with a 92-bit payload containing the calculated cluster positions. + } + \label{tab:dataformat-ff} + \begin{tabular}{@{}crl@{}} + \toprule + & Bit(s) & Description \\ \midrule + \parbox[t]{1mm}{\multirow{5}{*}{\rotatebox[origin=c]{90}{Header}}} & 111:100 & Bunch crossing ID. Ranges from 0 to 3653. \\ + & 99 & Raw data flag. Set to 0 in case of cluster data. \\ + & 98 & Parity bit of the 19 other header bits. \\ + & 97 & TFC flag. Set to 1 at arrival of control command(s). \\ + & 96:92 & Number of formed clusters. \\ \midrule + \parbox[t]{1mm}{\multirow{6}{*}{\rotatebox[origin=c]{90}{Payload}}} & 91:90 & Reserved. \\ + & 89:81 & Position information of the 1st formed cluster (if existing). \\ + & 80:72 & Position information of the 2nd formed cluster (if existing). \\ + & ... & ... \\ + & 17:9 & Position information of the 9th formed cluster (if existing). \\ + & 8:0 & Position information of the 10th formed cluster (if existing). \\ \bottomrule + \end{tabular} +\end{table} + +After the clustering, the data needs to be formatted and serialised in preparation for the transmission via the optical fibres. +The corresponding block in the Cluster FPGA operates at a clock frequency of \qty{80}{\mega\hertz}. +Along with the calculated cluster positions, it receives the time-sensitive commands from the control system. +The available information is encoded in a 112-bit data frame for each bunch crossing period. +Depending on the location of the ROB within the detector, and the mode in which it is operated, different formats are used. + +The general data format is shown in \vref{tab:dataformat-ff}. +It consists of a 20-bit header and 92-bit payload. +Within the header, 12 bits are used to label the bunch crossing ID of the current event. +It ranges from 0 to 3653 (incl.) and is required to time-align the incoming data from a total of \num{4096} optical fibres from the \scifitracker{} at the DAQ servers. +The number of formed clusters in the event is encoded as 5 bits. +The remaining 3 bits in the header comprises additional meta information and are still subject to change. + +The payload contains the calculated positions of the formed clusters. +Each cluster is assigned a 9-bit number. +The determined position itself is encoded in 8 of the 9 bits. +Since each Cluster FPGA processes the output of \num{128} PACIFIC channels, the position within the SiPM array can thereby be encoded in \num{0.5}-channel steps. +For large clusters involving more than four channels, bit 9 is set to 1 and sent along with the 8-bit position (unweighted arithmetic mean) of the last fragment of the cluster. +The position of the first fragment of the corresponding large cluster is encoded in the preceding 9 bits. + +Since both the header and the payload are of fixed length, the general data format as shown in \vref{tab:dataformat-ff} is also referred to as Fixed header, Fixed payload (FF) format. +It is used in \qty{80}{\percent} of the ROBs during normal data taking periods. +The remaining ROBs are operated in the so-called FV format with a fixed length header but a variable payload size. +This concerns \num{48} ROBs reading out the fibre modules that are directly surrounding the beam pipe. +Since these modules are experiencing the highest occupancies, having a payload of variable length allows to circumvent the limitation of ten clusters per event as it is the case for the FF data format. +The FV format uses a 32 events deep FIFO in the Cluster FPGA that allows unused space in low occupancy events to be filled with the data of previous events containing a large number of hits~\autocite{clusterboard-manual}. + +In addition, a modified FF data format exists that is used for debugging and calibration purposes. +In these cases, the payload contains the raw 2-bit outputs of the PACIFIC channels instead of the cluster positions. +However, the 92-bit payload is not sufficient to hold the raw data of the \num{128} associated channels. +Therefore, it requires multiple 112-bit data frames to transmit a single event, which means that it does not allow for a readout of the detector at the full rate of \qty{40}{\mega\hertz}. +This type of data is for instance required for performing threshold scans in order to calibrate the PACIFIC comparators (see \cref{sec:th_scan}). + +Independent of the format, the data frames are sent to the \MB{} via 28 differential outputs. +To allow for the transmission of the 4 bits per line and bunch crossing period of \qty{25}{\nano\second}, the data is serialised at both edges (DDR) of the underlying \qty{80}{\mega\hertz} clock. + + + +\section{Master Board} +The \MB{} (MB) presents the interface between the SciFi front-end electronics and the DAQ system at the opposite side of the optical links. +The basis of the \MB{} consists of a 16-layer PCB with a nominal thickness of \qty{2.15}{\milli\meter}~\autocite{masterboard-manual}. +With a length of \qty{132.5}{\milli\meter} and width of \qty{256.2}{\milli\meter} it directly connects to four adjacent \qty{60}{\milli\meter} wide Cluster-PACIFIC Board pairs~\autocite{mb-edms}. +As shown in the exploded view in \vref{fig:mb}, it houses various components that allow for the data transmission and communication with the back-end, as well as for providing power to the PACIFIC and Cluster Boards. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/MB} + \caption{ + Exploded view of a Master Board showing the various mounted components. + Image modified from Ref.~\autocite{mb-edms}. + } + \label{fig:mb} +\end{figure} + +A total of eight dedicated chips, the so-called Data GBTX ASICs, receive the data from the eight Cluster FPGAs and encode it into the GBT protocol that is used for transmission over the optical links~\autocite{gbt-project}. +Another ASIC of the same type, the Master GBTX, operates in a different mode that allows for the bidirectional communication with the back-end electronics. +The \MB{} features an additional FPGA that is referred to as Housekeeping (HK) FPGA. +It enables the operation of the light injection system (see \cref{sec:lis}) and is responsible for the monitoring of different Master GBTX status registers. + +On each board, 13 FEASTMP \DCDC{} converters~\autocite{feastmp} transform the \qty{8}{\volt} input voltage provided by the MARATON power supplies (see \cref{sec:lv}) into four different voltage levels required by the various components, including the ones mounted on the PACIFIC and Cluster boards. +In addition, a 26-pin D-SUB connector is installed on the board and connects to the CAEN modules (see \cref{sec:hv}) for biasing of the 16 associated SiPM dies. +Monitoring of the board temperature is enabled by eight NTC thermistors\footnote{B57301V2472H060 by TDK Electronics} mounted on different positions. + + +In the following, the key components of the \MB{} are discussed in more detail. + + +\subsection{Master GBTX} +\label{sec:master-gbtx} +The Master GBTX is essential for the operation of the SciFi front-end electronics as it is responsible for the communication with the back-end~\autocite{gbtx}. +Same as the GBT-SCA covered in \cref{sec:cluster-sca}, the underlying GBTX ASIC is part of the GBT project~\autocite{gbt-project}. +In order to establish the bidirectional optical link, it is operated in close conjunction with two other chips of the GBT project. + +The downlink is realised by connecting to a GigaBit Trans-Impedance Amplifier (GBTIA) ASIC. +The GBTIA amplifies and converts the weak photocurrent provided by the PIN diode that is detecting the incoming light through the optical fibre~\autocite{gbtia}. +The resulting digital differential voltage is received by the input stage of the GBTX. +Based on the data stream, a clock and data recovery (CDR) circuit recovers and generates the required \qty{4.8}{\giga\hertz} clock to correctly sample the data. +Afterwards, the data is deserialised. + +The uplink connection is enabled by a GigaBit Laser Driver (GBLD) ASIC~\autocite{gbld}. +It receives the serialised data from the GBTX and drives a \qty{850}{\nano\meter} vertical-cavity surface-emitting laser (VCSEL) accordingly. +Parameters of the GBLD like bias and modulation currents can be modified via a simplified \IIC{} master within the GBTX. +It is solely designed for this purpose and therefore cannot be used for the communication with other \IIC{} devices. + +Both the receiving part consisting of the GBTIA ASIC and PIN diode, as well as the transmitting part comprising the GBLD chip and VCSEL are embedded into a single device that is referred to as Versatile Transceiver (VTRx). +While the design work of the two associated ASICs was carried out in the framework of the GBT project, the VTRx is part of the Versatile Link project at the LHC~\autocite{versatile-link-project}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/GBT_Dataformat} + \caption{ + Structure of the 120-bit GBT frame as used in the Master GBTX for communication with the back-end electronics. + It consists of a 4-bit header, 2-bit internal and external slow control fields (IC and EC), 80 bits of data, and 32 bits used for a Forward Error Correction (FEC) code. + } + \label{fig:gbt_dataformat} +\end{figure} + +A GBT frame consists of 120 bits that are exchanged in each bunch crossing period (\qty{25}{\nano\second}) resulting in the total data rate of \qty{4.8}{\giga\bit/\second}. +The frame structure is illustrated in \vref{fig:gbt_dataformat}. +Each GBT frame is led by a 4-bit header that is required to synchronise the data stream at the frame level~\autocite{gbtx-manual}. +Repeated recognition of the header results in a valid synchronisation, also referred to as frame-locking. +Another 4 bits are reserved for slow control operations, which are split into internal and external control (IC and EC). +The 2-bit IC field is used for the internal control of the GBTX itself and can be used to access a total of \num{366} read/write and \num{70} read-only registers. +The 2-bit EC field is reserved for the implementation of an external slow control application, e.g. a separate GBT-SCA chip. +In case of the Master GBTX, this field with an associated bandwidth of \qty{80}{\mega\bit/\second} is used for the communication with the Master SCA (see \cref{sec:master-sca}). +The largest fraction of the GBT frame is allocated to an 80-bit data (D) field that can be used flexibly for the transmission of physics data, trigger signals and slow control commands. +The unified handling of these three functions is one of the greatest strengths of the GBT architecture. +In case of the Master GBTX, \numproduct{4 x 2} bits within the data field are used for the communication with the four associated Cluster SCAs (see \cref{sec:cluster-sca}). +Another \numproduct{8 x 8} bits are allocated for trigger signals going to the eight Cluster FPGAs (see \cref{sec:cluster-fpga}) within each HalfROB. +An additional \num{2} bits within the data field are reserved for the control of the light injection system via the HK FPGA (see \cref{sec:lis}). + +The remaining 32 bits are required for the implementation of a Forward Error Correction (FEC) code. +It is based on two interleaved Reed-Solomon RS(15,11) encoded words with 4-bit symbols~\autocite{reed-solomon}. +With a coding efficiency of \qty{70}{\percent}, it is capable of correcting bursts of 16 consecutive incorrectly transmitted bits~\autocite{gbtx-manual}. +The FEC is combined with a pseudorandom, self-synchronising scrambling algorithm to achieve a DC-balanced data transmission~\autocite{gbt-scrambling}. +DC-balanced signals contain an even distribution of 0s and 1s in order to prevent bit errors that can occur otherwise after a long series of the same bit state (caused for instance by unwanted charging of the coupling capacitor). + +The electrical connection of the GBTX chip with the various front-end devices is realised by so-called E-Links. +In the standard configuration, one E-Link is built from three differential signal pairs: downlink and uplink data, as well as a differential clock line. +However, not all three signal pairs have to be implemented in every application. +In addition, the E-Links offer a high flexibility in terms of the used data rate, which can be selected between \num{80}, \num{160} or \qty{320}{\mega\bit/\second} resulting in \num{2}, \num{4} or \num{8} assigned bits in the GBT frame, respectively. +Even higher bandwidths can be achieved by configuring multiple data lines in parallel. + +In addition to the E-Links, the GBTX implements a clock manager circuit that provides eight external user clocks with programmable phases and frequencies. +The clock frequency can be independently selected between \num{40}, \num{80}, \num{160} and \qty{320}{\mega\hertz}, while the phase can be varied in \qty{50}{\pico\second} steps. +In case of the Master GBTX, the eight external clocks are set to the system frequency of \qty{40}{\mega\hertz} and are provided as reference clocks to the eight Data GBTX ASICs (see \cref{sec:data-gbtx}). + + +\subsection{Master SCA} +\label{sec:master-sca} + +The Master SCA connects to the \qty{80}{\mega\bit/\second} E-Link of the Master GBTX that is assigned to the EC field. +It is based on the identical GBT-SCA chip employed in the Cluster SCA. +General remarks about the GBT-SCA ASIC can be found in \cref{sec:cluster-sca}. + +On the \MB{}, the SCA utilises ten of the available \IIC{} master interfaces for the control of the eight Data GBTX ASICs, as well as the HK FPGA and light injection system. +Re-programming of the HK FPGA is enabled via the SCA's JTAG interface, or alternatively the SPI, which is connected as a reserve. +Eight ADC inputs are allocated to monitor the temperature of the PCB using the eight NTC thermistors mounted on the board. +An additional ADC line is used to measure the input (low) voltage. + +All of the 32 available GPIO pins are in use. +They are set up as 15 output and 17 input lines. +Four inputs are indicating the connectivity to the four Versatile Twin Transmitter (VTTx) modules (see \cref{sec:data-gbtx}). +The remaining input pins are responsible for the monitoring of the power-good signals from the 13 FEASTMP \DCDC{} converters. +The \DCDC{} converters are arranged in four sections. +One section is always enabled, providing power to the essential components that are required for the communication with the back-end: the Master SCA itself, the Master GBTX, and the VTRx module. +The remaining three sections can be controlled with the help of three GPIO output lines. +Like this, it is possible to independently power on/off the left and right half of the \MB{} including the associated Cluster and PACIFIC Boards, as well as the \qty{3.3}{\volt} \DCDC{} converter that is powering the Cluster FPGAs. +Reset signals going to the Data GBTX ASICs and the HK FPGA (soft, hard and JTAG reset) are driven by 11 output pins and an additional line can be used to disable the light injection system. + + +\subsection{Data GBTX} +\label{sec:data-gbtx} +Unlike the Master GBTX that is configured for bidirectional communication with the back-end, the eight Data GBTX ASICs mounted on the \MB{} only provide an uplink data stream. +Therefore, instead of recovering the clock from the optical link, they receive the \qty{40}{\mega\hertz} reference clock from the Master GBTX. +In addition, the internal registers of the Data GBTX are accessed via \IIC{} from the Master SCA. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/GBT_Dataformat_Widebus} + \caption{ + Structure of the 120-bit GBT frame in wide mode as used in the Data GBTX for transmission of the physics data. + In the wide frame mode, the Forward Error Correction (FEC) is omitted in exchange for additional bandwidth. + For compatibility reasons, the allocation of the first 80 bits in the data field is identical to the default GBT frame structure depicted in \cref{fig:gbt_dataformat}. + } + \label{fig:gbt_dataformat_wide} +\end{figure} + + +As discussed in \cref{sec:dataformat}, the data transmission from the Cluster FPGA takes place via 28 differential E-Link data lines each operating at \qty{160}{\mega\bit/\second}. +Thereby, each Data GBTX receives a data frame consisting of 112 bits per bunch crossing interval. +As this exceeds the available bandwidth in the default GBT frame structure presented in \cref{fig:gbt_dataformat}, a different format for the optical data transmission to the back-end has to be used. +Therefore, the Data GBTX ASICs are operating in the GBT wide frame mode. +As illustrated in \vref{fig:gbt_dataformat_wide}, the available data field is extended to 112 bits in this mode. +However, no protection against transfer errors is available as the FEC field is traded for the additional \qty{40}{\percent} bandwidth. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/Datachain} + \caption{ + Data stream and corresponding bandwidths between the different components of the SciFi front-end electronics. + In total, \num{4096} instances of the shown chain are present in the detector, resulting in a total data rate of about \qty{20}{\tera\bit/\second} arriving at the back-end. + } + \label{fig:datachain} +\end{figure} + +The Data GBTX marks the last stage of the data chain, before being transmitted over the optical fibres to the back-end. +A summary of the complete chain within the SciFi front-end electronics is pictured in \vref{fig:datachain}. +The following optical transmission of the data is realised by four Versatile Twin Transmitter (VTTx) modules~\autocite{versatile-link-application-note}. +The package is identical to the VTRx modules, but, to address the typical need for asymmetric bandwidth in HEP experiments, the optical receiver is replaced with an additional transmitter channel. +Thereby, two neighbouring Data GBTX ASICs share one VTTx module. + +Five of the eight external user clocks of each Data GBTX are utilised and provided to the various stages in the data chain, ranging from \qty{40}{\mega\hertz} as required by the clustering block to \qty{320}{\mega\hertz} used for the operation of the PACIFICs. +Their phases have to be carefully adjusted to each other to ensure a stable and reliable data transfer over the complete chain. +Further details about this tuning process is given in \cref{sec:timing_scans}. + + +\section{Light Injection System} +\label{sec:lis} +The light injection system (LIS) is a critical component for the proper functioning of the \scifitracker{}. +It enables the calibration of the individual channels by artificially injecting light into the scintillating fibres close to the SiPMs while performing the PACIFIC threshold scans (see \cref{sec:th_scan}). + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/LIS} + \caption{ + Schematic illustration of a fully assembled detector module including the light injection system. + Image adapted from Ref.~\autocite{lis}. + } + \label{fig:lis} +\end{figure} + +As shown in \vref{fig:lis}, the main part of the LIS is located within the end plugs of the fibre modules. +It consists of a \qty{670}{\nano\meter} VCSEL and a plastic optical fibre that guides the emitted light towards the fibre mat end piece. +The last \qty{13}{\centi\meter} of the optical fibre, matching the width of the fibre mat, is embedded into an aluminium bar that is referred to as light injection bar. +Along that length, the fibre is scratched allowing light to escape. +Subsequently, the escaped photons travel through the transparent end piece, enter the scintillating fibres, and finally reach the SiPM channels. + +The VCSEL is driven by an external GBLD, the same chip that is used in the transmitter channels of the VTRx and VTTx modules. +A pair of two GBLDs and two VCSELs is mounted on a 6-layer PCB~\autocite{lis}. +Each fibre module is equipped with two of these boards in order to illuminate the four fibre mats contained within. +A \qty{28}{\centi\meter} long flex cable is guided along the surface of the fibre module and connects the LIS PCB with the \MB{} via a 20-pin low-profile connector\footnote{TLH-010-0.50-G-D-A by Samtec, Inc.}. + +Operational settings of a GBLD pair, like bias and modulation currents, can be accessed from the Master SCA via \IIC{} (see \cref{sec:master-sca}). +The input signal to the GBLDs, in the following referred to as LIS pulse, is provided by the HK FPGA and determines the delay and duration of the resulting light pulse. +The generation of the LIS pulse is based on a dedicated calibration command from the control system. +Unlike the slow control commands, the so-called CalibC pulse is a time-sensitive signal that can be issued in a particular bunch crossing period and thus be shifted in steps of \qty{25}{\nano\second}. +As part of the GBT frame, it is received by the Master GBTX and provided to the HK FPGA via a dedicated E-Link. + +However, as discussed previously in \cref{sec:pacific_processing}, finer tuning of the LIS pulse other than the \qty{25}{\nano\second} steps is required in order to align it with respect to the \mbox{PACIFIC} integration intervals. +For that purpose, two unused external user clocks with programmable phase and frequency that are available in one of the Data GBTX ASICs are utilised. +They are denoted as the start and stop clock and are set to the lowest possible frequency, i.e. to \qty{40}{\mega\hertz}. +The generation of the LIS pulse is based on the interplay of the different signals and illustrated in the timing diagram in \vref{fig:lis-timing-diagram}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/LIS_Timing_Diagram} + \caption{ + Timing diagram of the LIS pulse generation in the HK FPGA. + The system clock and CalibC pulse are received from the Master GBTX. + The start and stop clocks are provided by the third Data GBTX on the \MB{}. + } + \label{fig:lis-timing-diagram} +\end{figure} + +Upon arrival of the CalibC pulse, the first rising edge of the start clock defines the start of the LIS pulse. +Similarly, the following rising edge of the stop clock marks the end of the resulting pulse. +Like this, it is possible to vary the delay of the LIS pulse in very fine steps (\qty{50}{\pico\second}) by shifting the phases of the two clocks equally. +In addition, the width of the pulse and thereby the light intensity can be adjusted by only shifting the phase of the stop clock. +However, given the underlying clock frequencies of \qty{40}{\mega\hertz}, both the delay and duration of the pulse can only be adjusted within a range of \qty{25}{\nano\second}. +In case of the delay, this is accounted for by issuing the CalibC command in the previous or following bunch crossing period. +LIS pulse widths larger than \qty{25}{\nano\second} are typically not required but are still possible by instructing the HK FPGA to skip a certain amount of stop clock edges, thereby effectively increasing the width in steps of \qty{25}{\nano\second}. + +In practice, the delay and width can not be varied freely over the entire dynamic range of \qty{25}{\ns}, which can become an issue in particular for the delay, if the best timing happens to be out of reach. +The reason for this is that when the clock and CalibC edges are too close to each other ($< \qty{1}{\nano\second}$), due to jitter, the order of the signals is not guaranteed. +The result is an unstable pulse that shows jumps by about \qty{25}{\nano\second} in either delay or width. +In case of the width, the unstable configurations are simply avoided and compensated by changing the modulation current of the GBLD to tune the light intensity. +However, no alternative method is available for changing the delay of the LIS pulse. +Therefore, a mechanism was implemented that allows for the clocking of the CalibC signal by the falling edge of the system clock instead of the rising edge, thereby effectively shifting it by \qty{12.5}{\nano\second}. +In principle, this allows for a range of the pulse delay of \qty{37.5}{\nano\second}, which is still covering the full \qty{25}{\ns} bunch crossing period when avoiding the configurations around the edges. + +To validate the LIS pulse generation, the output light pulse was measured with the help of a PIN diode and an oscilloscope using different delays and widths of the generated LIS pulse. +\Vref{fig:lis-osci} shows the signal from the PIN diode, as well as the LIS and CalibC pulse, which was used as the trigger. +In addition, the measured light pulses with different delay and width configurations are displayed, demonstrating a proper functioning of the LIS and its tuning mechanisms as described previously. + +\begin{figure} + \begin{subfigure}{1.0\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/LIS_Oscilloscope} + \caption{Overview} + \end{subfigure}\\[1ex] + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/LIS_Oscilloscope_Delays} + \caption{Different pulse delays} + \end{subfigure} + \hfill + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/fee/LIS_Oscilloscope_Widths} + \caption{Different pulse widths} + \end{subfigure} + + \caption{ + Validation of the LIS pulse generation using an oscilloscope and a PIN diode that measures the output light of the VCSEL. + The top image (a) shows the three probed signals. + The bottom images display the measured PIN diode voltages for different LIS pulse delays (b) and widths (c). + The CalibC pulse appears later as it was probed on a separate setup due to difficult accessibility at the LIS itself. + Nevertheless, it serves as a reference signal and was used as the trigger for the oscilloscope. + } + \label{fig:lis-osci} +\end{figure} + +Besides from enabling the calibration of the detector, the LIS also plays an important role for the commissioning of the front-end electronics as it allows to identify malfunctioning channels. +Further details about the usage of the LIS in the commissioning is given in \cref{sec:lis-tests}. + + + +\section{Quality Assurance} +\label{sec:qa} +After production, the individual front-end electronics components undergo different quality assurance (QA) tests to ensure proper functioning. +These include standard test procedures of the assembled PCBs like +\begin{itemize} + \setlength\itemsep{0em} + \item 3D Automated Optical Inspection (3D AOI) + \item Automated X-ray Inspection (AXI) + \item Flying Probe Testing (FPT) + \item Temperature Cycle Testing (TCT) +\end{itemize} +that are mainly conducted on-site at the production companies. +Additionally, for some parts, extended functional tests are performed at the institutes within the SciFi collaboration~\autocite{lis,fee-qa}. + +The QA of the \PB{}s is conducted at Tsinghua University and the University of Valencia. +Within a custom designed test DAQ developed at Heidelberg University, each board has to pass a series of tests. +Starting with a check of the power consumption, it is ensured that the communication via \IIC{} and the digital input signals are operational. +As one of the last steps, the DC baselines of the two integrators per channel are aligned (trimming) and the obtained parameters (trim DACs) are saved along with the ID of the board. +Further details about the trimming procedure are given in \cref{sec:trimming}. +Prior of being mounted on a \PB{}, each PACIFIC ASIC also undergoes an individual test sequence. +%Besides from similar checks as performed on the board-level described before, the reference voltages $V_\text{REF}$ and $V_\text{refDCFB}$ are tuned to match their intended values of \qty{0.5}{\volt} and \qty{0.7}{\volt} in the process. +Besides from similar checks as performed on the board-level described before, the reference voltages are tuned in the process to match their intended values. + +In case of the \CB{}, the assembled PCBs are examined at LPC in Clermont-Ferrand. +Within a dedicated setup, two boards are tested in parallel. +The procedure includes the injection and evaluation of test patterns, monitoring the current consumption, as well as testing the functionalities of the GBT-SCA. +Furthermore, the programmability of the Cluster FPGAs is ensured. + +At RWTH Aachen, the test setup for the LIS components is located. +Therein, the operational settings for the bias ($I_\text{bias}$) and modulation currents ($I_\text{mod}$) of the GBLDs and VCSELs are determined in order to achieve a predefined light intensity. +These values are of crucial importance for the calibration of the PACIFIC threshold DACs (see \cref{sec:th_scan}) that is required to take high quality physics data. +Therefore, a further fine-tuning of $I_\text{bias}$ and $I_\text{mod}$ is performed on the LHCb site at CERN during the QA of the fully assembled fibre modules including LIS, cold boxes and SiPMs. + +Apart from the tests at the production company, the \MBs{} do not undergo individual testing but are examined in conjunction with the remaining boards: +In a dedicated setup on the LHCb site, every assembled ROB is thoroughly tested in its final configuration including being readout via the optical links. +Further details about the test-stand and procedure are given in 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--git a/introduction.tex b/introduction.tex new file mode 100644 index 0000000..d33b017 --- /dev/null +++ b/introduction.tex @@ -0,0 +1,64 @@ +\chapter{Introduction} +\label{ch:introduction} + +The Standard Model (SM) of particle physics~\autocite{Glashow, Salam, Weinberg} is a well tested and very successful theory that explains the structure of matter and the interactions between the elementary particles. +According to the SM, all visible forms of matter are composed of 12 fundamental particles, which are divided into the groups of quarks and leptons. +Furthermore, it includes the gauge bosons that are the mediators of the interactions between these particles. +One of them is the well-known photon, which is the force carrier of the electromagnetic force. +Together with the strong and weak interaction, they represent the three fundamental forces included in the model. +Lastly, there is the Higgs boson, which was predicted by Peter Higgs in 1964~\autocite{higgs-theory}. +The associated Higgs field plays an important role in the SM, as it explains how the elementary particles gain their masses. + +While almost any experimental observation in the field of particle physics is in agreement with the SM predictions, it is not a complete theory. +This can already be seen from the fact that the gravitational force, although negligible at the subatomic scale, is not covered by it. +Other observations that cannot be explained by the SM are the asymmetry between matter and antimatter in the universe~\autocite{baryon-asymmetry}, the existence of dark matter~\autocite{dark-matter}, and the measurement of neutrino oscillations~\autocite{neutrino-oscillations}. +It is therefore essential to continue the thorough testing of the SM, as well as theories beyond it. + +In 2012, with the observation of the Higgs boson at the Large Hadron Collider (LHC), the last missing elementary particle of the SM was discovered~\autocite{atlas-higgs, cms-higgs}. +The LHC near Geneva, Switzerland, is the most powerful particle accelerator in the world. +By colliding high-energy protons at enormous intensities, it provides the ideal conditions to probe the SM and search for new physics phenomena. + +The \lhcbexperiment{} is one of four major experiments that are located at the LHC. +It is a dedicated experiment specialised in studying hadrons\footnote{Hadrons are composite particles made of two or more quarks that are bound by the strong interaction. +They are further divided into mesons (usually containing two quarks) and baryons (usually three quarks).} containing $b$ and $c$ quarks. +They are produced in the proton-proton collisions and decay again after a short time into other particles, which can be detected in the experiment. +During the first years of operation starting from 2010, the \lhcbexperiment{} has recorded the world's largest samples of events containing $b$ and $c$ hadrons~\autocite{lhcb-performance}. + +The collected samples allowed for performing important measurements in the field of flavour physics such as the observation of the rare decay ${B^0_s \rightarrow \mu^+\mu^-}$~\autocite{bmumu}, the determination of the CKM\footnote{The Cabibbo–Kobayashi–Maskawa (CKM) matrix parametrises the relative weak coupling strengths between the different quark flavours.} angle $\gamma$~\autocite{gamma} or the test of lepton universality~\autocite{Rk}. +While the latter already revealed a slight tension compared to the SM prediction, the significance of the measurement is statistically limited. +In fact, many key results at LHCb are limited by the statistical sensitivity of the data samples. +Therefore, to be competitive with the uncertainties of the theoretical predictions, the \lhcbexperiment{} will collect data at five times the previous luminosities\footnote{At particle colliders, the luminosity $\luminosity$ is a measure for the interaction rate $\dot{N}$ relative to the cross-section $\sigma$.} starting from the middle of the year 2022. +In order to prepare the detector for the increasing rates, a three-year upgrade period was required during which in particular the tracking system has been improved. + +An essential component of the upgraded tracking system is a detector made of scintillating fibres: the LHCb Scintillating Fibre (SciFi) Tracker. +With a fibre diameter of \qty{250}{\micro\meter}, it provides sufficient granularity for the higher number of particle tracks in each event. +The produced scintillation light is detected by arrays of silicon photomultipliers (SiPMs), whose output signals are processed and digitised by a complex chain of front-end electronics. +The electronics is designed and optimised to sample the signals at a rate of \qty{40}{\mega\hertz}, matching the proton bunch collision rate at the LHC. +While the initial version of the \lhcbexperiment{} was only read out at a fraction of that rate, the so-called trigger-less readout is required to fully exploit the increase in luminosity. + +In the context of this thesis, several contributions to the \scifitracker{}, in particular to the front-end electronics, have been made. +While supporting various steps in the research and production phase of the different electronic components, the main responsibility was the initial commissioning of the electronics on a large scale alongside the surrounding infrastructure and the upgraded LHCb DAQ system. +A major challenge that had to be overcame in this context was the establishment of the \qty{40}{\mega\hertz} readout of the complex detector. +In its final configuration, the \scifitracker{} will produce data volumes up to \qty{20}{\tera\bit/\s} corresponding to about \qty{40}{\percent} of the entire \lhcbexperiment{}. + +As part of the front-end electronics commissioning, a detailed test procedure has been defined, developed and implemented. +In the process, every component is thoroughly tested and validated in its final environment before being released for installation in the experiment. +This also includes first calibration and tuning steps that are required for the proper operation of the detector. + +The following contents will be discussed in the course of this thesis: +In \cref{ch:lhcb}, the \lhcbexperiment{} is further introduced, followed by the \scifitracker{} in \cref{ch:scifi}. +Afterwards, in \cref{ch:fee}, a detailed overview on the SciFi front-end electronics is given, providing a first complete reference of all components involved. +In \cref{ch:commissioning}, the commissioning procedure is presented and the results from the commissioning of a large fraction of the detector are shown. +Finally, performance studies that were conducted alongside the commissioning are discussed in \cref{ch:performance}. + + +% Old stuff +%The collected samples allowed for performing key measurements of \textit{CP} violation\footnote{\textit{CP} violation is associated to an asymmetry in the behaviour of particles and their corresponding antiparticles} and the observation of (very) rare processes. + +%A key measurement enabled by the collected samples was the observation of the decay of a $B^0_s$ meson into two muons: ${B^0_s \rightarrow \mu^+\mu^-}$~\autocite{bmumu}. +%Although it is a very rare process\footnote{About 1 out of 300M $B^0_s$ mesons decays into two muons.} in the SM, it is accurately predicted by the theory~\autocite{bmumu-theory}. +%On the other hand, the clear signature of the decay allows for a clean measurement in the LHCb detector. +%While the current measurements are in agreement with the SM prediction, they are still limited by statistical uncertainties. +%In addition, the related and even rarer decay $B^0 \rightarrow \mu^+\mu^-$ could not be observed yet. + +%To allow for even preciser measurements and to uncover even rarer processes like the related $B^0 \rightarrow \mu^+\mu^-$ decay, which could not be observed yet, the \lhcbexperiment{} will collect data at five times the previous luminosities\footnote{At particle colliders, the luminosity $\luminosity$ is a measure for the interaction rate $\dot{N}$ relative to the cross-section $\sigma$.} starting from the middle of this year 2022. diff --git a/latexmkrc b/latexmkrc new file mode 100644 index 0000000..34cec3b --- /dev/null +++ b/latexmkrc @@ -0,0 +1,6 @@ +# Settings inspired from +# https://www.semipol.de/2018/06/12/latex-best-practices.html#building-latex-documents +$pdf_mode = 1; +$out_dir = 'build'; +@default_files = ('main.tex'); +# $biber = 'biber --validate-datamodel %O %S'; # Report errors in bibliography database diff --git a/lhcb.tex b/lhcb.tex new file mode 100644 index 0000000..753db84 --- /dev/null +++ b/lhcb.tex @@ -0,0 +1,286 @@ +\chapter{The LHCb Experiment at the LHC} +\label{ch:lhcb} + +This chapter aims at introducing the \lhcbexperiment{} at the Large Hadron Collider (LHC). +The LHC is the largest circular particle accelerator and collider in the world and is located near Geneva, Switzerland. +With a circumference of about \qty{27}{\km}, it is placed in a tunnel between \qty{45}{\m} and \qty{170}{\m} below the surface and is operated by the European Organization for Nuclear Research (CERN) as part of a larger accelerator complex~\autocite{lhc}. + +The LHC is designed to collide two proton beams at centre-of-mass energies up to $\qty{14}{TeV}$. +The high-energy beams are guided around the accelerator ring by superconducting magnets, which are cooled below \qty{2}{\kelvin} using superfluid helium. +The beams consist of bunches spaced \qty{25}{\ns} apart, each containing about $10^{11}$ protons. +They travel in opposite directions in two separate beam pipes and are brought to collision at four different points along the ring, resulting in a maximum bunch crossing rate of \qty{40}{\mega\hertz} and an instantaneous luminosity of up to ${10^{34}\,\unit{\per\square\centi\meter\per\second}}$. +However, several gaps are foreseen in the filling scheme to allow for reliable dumping of the beams, reducing the average collision rate to about \qty{30}{\mega\hertz}~\autocite{lhc}. + +The four major experiments ATLAS, CMS, ALICE and LHCb are placed around the interaction points to study the collisions. +ATLAS~\autocite{atlas} and CMS~\autocite{cms} are the largest of the four and are designed as multi-purpose detectors covering a broad physics spectrum. +By making use of the high luminosity provided by the LHC, the data collected at ATLAS and CMS led to the discovery of a new particle in 2012~\autocite{atlas-higgs,cms-higgs}, whose properties were later found to be in agreement with the Higgs boson in the Standard Model~\autocite{higgs-theory,higgs-properties}. +ALICE is a general-purpose detector focusing on the physics of strongly interacting matter and the quark-gluon plasma~\autocite{alice}. +To allow for this, the LHC is designed to be able to also accelerate and collide heavy (Pb) ions at centre-of-mass energies up to \qty{1.15}{PeV}~\autocite{lhc}. +While ALICE is specialised in studying these collisions, the other experiments make use of the data collected during heavy ion runs as well. + +This also includes the \lhcbexperiment{} that is dedicated to study rare decays of hadrons containing $b$ and $c$ quarks as well as performing precision measurements of \textit{CP} violation~\autocite{lhcb}. +The experiment is located in a cavern \qty{100}{\meter} below the surface at the border between France and Switzerland near the airport of Geneva. + + +\subsubsection{Detector Design} +The LHCb detector is designed as a single-arm forward spectrometer covering an angle between \qty{10}{mrad} and \qty{300}{mrad} (\qty{250}{mrad}) in the bending (non-bending) plane of the dipole magnet~\autocite{lhcb}. +This corresponds to a pseudorapidity\footnote{The pseudorapidity $\eta$ is related to the angle to the beam pipe $\theta$ via the equation \mbox{$\eta = - \text{ln}[\text{tan}(\theta/2)]$}.} range $2 < \eta < 5$ and accounts for about \qty{4}{\percent} of the solid angle. +As illustrated in \vref{fig:lhcb}, a right-handed coordinate system is adopted at LHCb, whose $z$-axis runs horizontally in the direction of the beam pipe. +The other horizontal axis ($x$) is the direction in which charged particles are mainly bent when passing through the magnetic field. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/lhcb/LHCb} + \caption{ + Schematic side view of the upgraded LHCb detector. + The proton-proton collisions take place inside the Vertex Locator on the left. + Image taken from Ref.~\autocite{scifi-tdr}. + } + \label{fig:lhcb} +\end{figure} + +Unlike the three general-purpose detectors at the LHC (ATLAS, CMS and ALICE), which are built in a cylindrical shape around the interaction point in order to achieve a large geometric coverage, the special design of the LHCb detector was chosen specifically for its field of application: +As shown in the simulations in \vref{fig:bbangles}, the $b\overline{b}$ quark pairs that are of particular interest at LHCb are predominantly produced at small opening angles to the beam axis, which is reflected in the geometry of the detector. + +\begin{figure} + \captionsetup[subfigure]{aboveskip=1pt, belowskip=12pt} %Tune space between captions and subfigures + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/lhcb/BBangles} + \end{subfigure} + \hfill + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/lhcb/BBangles_vs_GPD} + \end{subfigure} + \caption{ + Simulated $b\overline{b}$ production angles at centre-of-mass energies $\sqrt{s} = \qty{14}{TeV}$ as a function of the angles $\theta_{1,2}$ (left) and pseudorapidities $\eta_{1,2}$ (right). + The LHCb acceptance is highlighted in red and is compared with typical values for a general-purpose detector in case of the pseudorapidities. + Images modified from Ref.~\autocite{bbangles}. + } + \label{fig:bbangles} +\end{figure} + +Between 2019 and 2022, the detector has undergone a major upgrade in order to boost the future data collection rates and thus significantly reduce the statistical uncertainties of the measurements. +In the following, the upgraded \lhcbexperiment{} as well as the scope of the upgrade are presented. + + +\section{Detector Upgrade} +During the first years of operation between 2010 and 2018, the (initial) LHCb detector recorded data corresponding to an integrated luminosity of about \qty{9}{\per\femto\barn}. +Towards the end of this period, the detector was operating at a centre-of-mass energy $\sqrt{s} = \qty{13}{TeV}$ and an instantaneous luminosity ${\luminosity = \qty{4e32}{\per\square\centi\meter\per\second}}$~\autocite{luminosity}. +It should be noted that this value is about two orders of magnitudes below the LHC design luminosity. +With the help of a tunable beam focus and separation at its interaction point, LHCb is able to lower the luminosity to an optimal level for the experiment~\autocite{lhcb}. +This procedure is performed in order to limit the number of visible proton-proton interactions per bunch crossing, which is required for a clean and efficient event reconstruction. + +Starting from LHC Run 3 in 2022, the LHCb detector will be operated at five times the luminosity compared to before the upgrade. +Until the end of Run 4, this corresponds to a collected data volume of \qty{50}{\per\femto\barn}~\autocite{upgrade-loi}. +This results in a significant reduction of statistical uncertainties and allows the experiment to reach its full flavour-physics potential at the LHC. +However, several improvements need to be made during the upgrade prior to Run 3 in order to prepare the detector for the larger number of proton-proton interactions and track multiplicities. + +This concerns in particular the LHCb tracking system, which is completely replaced during the upgrade between 2019 and 2022. +Furthermore, the trigger system undergoes a fundamental change. +In the initial version, the readout of the detector was performed at \qty{1}{\mega\hertz} as determined by the first trigger level implemented in hardware~\autocite{lhcb}. +While the so-called L0 trigger provides high efficiencies for dimuon events, it quickly saturates for hadronic channels~\autocite{upgrade-loi}. +To fully profit from the increase in luminosity, it was decided to perform a trigger-less readout of the complete detector at the \qty{40}{\mega\hertz} bunch crossing rate. +To achieve this, it is required that the front-end electronics of all sub-systems are revised and replaced. + +In the following, an overview of the various sub-systems of the upgraded LHCb detector is given. + +\section{Tracking System} +As previously discussed, the tracking system undergoes major changes during the LHCb upgrade as it is completely replaced by new detectors. +The system is responsible for reconstructing the trajectories of charged particles. +It consists of three parts that are located closely around the interaction point in order to resolve production and decay vertices, as well as before and after the dipole magnet. +By measuring the deflection angle of charged particles caused by the Lorentz force in the magnetic field, this arrangement enables the determination of the particles' momenta. + +\subsubsection{Vertex Locator (VELO)} +The (upgraded) LHCb Vertex Locator (VELO) is a silicon pixel detector that is placed closely around the proton-proton interaction region. +It consists of two detector halves equipped with \num{26} modules each. +The modules are arranged along the beam axis and are oriented perpendicular to the beam. +The detector consists of a total of about 41M pixels with a size of \qtyproduct[product-units=power]{55 x 55}{\micro\meter}~\autocite{velo-tdr}. +They are grouped in four silicon hybrid pixel tiles per module, whereas each tile is readout by three VeloPix ASICs. +The total output data rate is estimated at \qty{1.6}{Tbit/s} while reading out the front-end electronics at the full LHC bunch crossing rate of \qty{40}{\mega\hertz}~\autocite{velo-paper}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/lhcb/VELO} + \caption{ + Schematic view of one half of the upgraded LHCb Vertex Locator (VELO) consisting of \num{26} modules (left). + Two opposing modules from both halves in the closed position are shown on the right. + Image adapted from Ref.~\autocite{velo-paper2}. + } + \label{fig:velo} +\end{figure} + +A special feature of the VELO is the ability to mechanically change the distance between the modules and the beams. +In the closed state, the active pixels will be as close as \qty{3.5}{\milli\meter} from the proton beams, allowing precise resolution of the reconstructed tracks and vertices during normal operation of the LHC~\autocite{velo-paper}. +On the other hand, this feature offers protection from unstable beam conditions by mechanically increasing the distance to the beams (open state). +In order to allow for the two detector halves to be closed completely, the modules are slightly shifted along the beam axis relative to the opposing half. +A schematic view of one VELO half as well as two opposing modules in the closed position are shown in \vref{fig:velo}. + + +\subsubsection{Upstream Tracker (UT)} +The Upstream Tracker (UT) is located just in front, i.e. upstream of the dipole magnet. +As shown in \vref{fig:ut} (left), the detector is arranged in four detection layers that are equipped with silicon strip sensors. +Each plane has an active area of approximately \qty{2}{\meter\squared}, which covers the full acceptance of the \lhcbexperiment{}. +In order to obtain the highest possible hit resolution in the horizontal, bending direction of the magnet, the strips in the outer layers are oriented vertically. +The resolution in the non-bending direction is achieved by rotating the two inner layers by \qty{\pm 5}{\degree}. +Depending on the track occupancy and radiation dose, four different sensor types are in use. +The majority of sensors (type A) have a strip pitch of \qty{187.5}{\micro\meter}, while the pitch of the three sensor types closer to the beam pipe amounts to \qty{93.5}{\micro\meter}~\autocite{ut}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/lhcb/UT} + \caption{ + Schematic layout of the Upstream Tracker (UT) with the four detection layers (left). + The detector is composed of four different sensor types: Type A (green), B (yellow), C and D (pink). + It is built from vertical staves, which carry the sensors and readout hybrids as shown on the right. + Image adapted from Ref.~\autocite{ut}. + } + \label{fig:ut} +\end{figure} + +The detector is built from a total of \num{68} elongated support structures that are referred to as staves. +As illustrated in \vref{fig:ut} (right), each stave is equipped with 14 to 16 silicon strip sensors. +They are mounted from both sides with a slight overlap between neighbouring sensors. +Each sensor is accompanied by a readout hybrid carrying up to eight custom front-end chips, called SALT. +The radiation-hard chips are based on \qty{130}{\nano\meter} technology and were developed to sample the signals at the LHC frequency of \qty{40}{\mega\hertz}. +The resulting digital signals are sent via flex cables to the near-detector electronics~\autocite{ut}. + + +\subsubsection{Scintillating Fibre (SciFi) Tracker} + +\begin{figure} + \centering + \includegraphics[width=0.7\textwidth]{figures/lhcb/Radiation_Map} + \caption{ + Expected dose in the $x$-$y$ plane at $z = \qty{783}{\centi\meter}$ after an integrated luminosity of \qty{50}{\per\femto\barn}. + The Scintillating Fibre (SciFi) modules of the first tracking station located at this position are shown superimposed. + The integrated dose absorbed in the fibres towards the centre peaks at about \qty{35}{kGy}. + Image modified from~\autocite{scifi-tdr}. + } + \label{fig:radiation-map} +\end{figure} + +The last component within the LHCb tracking system is the Scintillating Fibre (SciFi) Tracker~\autocite{scifi-tdr}. +It consists of three stations that are located downstream of the magnet. +Each station is composed of four detection layers that follow a similar geometry as the UT with the two inner layers being tilted by \qty{\pm 5}{\degree}. +The active area, which amounts to about \qty{30}{\meter\squared} per layer, is built from staggered layers of scintillating fibres with a diameter of \qty{250}{\micro\meter}. +They are read out by arrays of silicon photomultipliers (SiPMs), which are located at the top and bottom of the detector outside of the geometrical acceptance. +In the adjacent front-end electronics boxes, the SiPM signals are processed and digitised at the full LHC bunch crossing frequency of \qty{40}{\mega\hertz}. +The dimensions of one detector layer are illustrated in \vref{fig:radiation-map}, along with the expected radiation dose at the position of the first station after an integrated luminosity of \qty{50}{\per\femto\barn}. + +The \scifitracker{} and in particular its front-end electronics are the subject of this thesis and are therefore discussed in detail in the following chapters. + +\section{Particle Identification} +The particle identification (PID) capabilities play an important role for any flavour-physics experiment and has been essential for the success of LHCb during the first years of operation~\autocite{pid-tdr}. +It consists of the Ring Imaging Cherenkov (RICH) system, two calorimeters and the muon stations. +Compared to the tracking system, only small changes have been made to the PID system during the LHCb upgrade and mostly affect the RICH detectors. + + +\subsubsection{Ring Imaging Cherenkov (RICH) Detectors} +The main purpose of the RICH detectors is the separation of kaons and pions. +This is achieved by utilising Cherenkov light, which occurs when a charged particle traverses a medium faster than the speed of light. +In combination with the momentum as provided by the tracking system, the emission angle can be used to determine the mass of the particle. + +Two separate detectors form the RICH system at LHCb and are referred to as RICH1 and RICH2. +As shown in \vref{fig:lhcb}, RICH1 is placed between the VELO and UT and covers the full angular acceptance of the detector and a momentum range of \qtyrange[range-phrase=--,range-units=single]{10}{50}{GeV/c}. +On the other hand, RICH2 is located downstream of the \scifitracker{} and specialises in high momentum particles between \qtyrange[range-phrase=--,range-units=single]{15}{100}{GeV/c} with angles up to \qty{120}{mrad}~\autocite{rich-paper}. +For these purposes, RICH1 uses $\text{C}_{4}\text{F}_{10}$ gas as the medium, while $\text{CF}_4$ is used in RICH2~\autocite{pid-tdr}. + +\begin{figure} + \captionsetup[subfigure]{aboveskip=1pt, belowskip=12pt} %Tune space between captions and subfigures + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/lhcb/RICH1} + \end{subfigure} + \hfill + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/lhcb/RICH1_Occupancy} + \end{subfigure} + \caption{ + Schematic side view of the upper half of RICH1 (left) and simulated single channel occupancy (right). + Modifications to the mechanical and optical system in the course of the upgrade are indicated by the red arrows in the side view. + Images taken from Ref.~\autocite{rich-paper}. + } + \label{fig:rich} +\end{figure} + +While the enclosure of the RICH detectors could be reused in the upgrade, some modifications to the mechanical and optical systems were required in order to expand the focal point and thereby reduce the channel occupancy. +The modifications along with the simulated occupancy are shown in \vref{fig:rich}. +Due to the performed changes, the maximum occupancy can be limited to \qty{27}{\percent}~\autocite{rich-paper}. + +For both RICH1 and RICH2, commercial multi-anode photomultiplier tubes (\mbox{MaPMTs}) are used for the detection of the Cherenkov light, along with external front-end electronics. +The \qty{40}{\mega\hertz} readout is enabled by a custom designed, radiation-hard ASIC in \qty{0.35}{\micro\meter} CMOS technology that is referred to as CLARO~\autocite{claro}. + + +\subsubsection{Calorimeters} +The upgraded LHCb calorimetry system is composed of two sub-detectors that are located downstream of RICH2: an electromagnetic (ECAL) and a hadronic (HCAL) calorimeter~\autocite{pid-tdr}. +Combined, they are responsible for the identification of electrons, photons and hadrons, as well as the determination of their energy. +Both calorimeters employ a design with alternating layers of absorbers and scintillators. +The produced scintillation light is transmitted via wavelength shifting fibres and is detected by photomultiplier tubes (PMTs). + +One ECAL module is built from \num{66} stacked layers of lead absorbers (\qty{2}{\milli\meter} thick) and scintillators (\qty{4}{\milli\meter}). +The module size varies from \qtyproduct[product-units=power]{121.1 x 121.1}{\milli\meter} in the outer section of the ECAL, down to \qtyproduct[product-units=power]{40.4 x 40.4}{\milli\meter} in the hottest region around the beam pipe. +In contrast, the HCAL consists of alternating layers of scintillators (\qty{4}{\milli\meter}) and iron absorbers (\qty{16}{\milli\meter}), and employs two different module sizes of \qtyproduct[product-units=power]{131.3 x 131.3}{\milli\meter} and \qtyproduct[product-units=power]{262.6 x 262.6}{\milli\meter} in the inner and outer sections, respectively~\autocite{lhcb}. + +No changes to the calorimeter modules have been required during the upgrade since studies have shown that the granularity is sufficient even when being operated at a luminosity of \qty{2e33}{\per\square\centi\meter\per\second} starting from LHC Run 3. +However, new front-end electronics had to be developed to support the readout rate of \qty{40}{\mega\hertz}, as well as having a higher preamplifier sensitivity in order to mitigate the gain degradation of the PMTs caused by increasing levels of radiation~\autocite{velo-paper}. + +\subsubsection{Muon Stations} +Similar to the calorimeters and apart from redeveloping the front-end electronics for the trigger-less readout, the muon sub-detector remains mostly untouched during the LHCb upgrade. +It consists of four stations downstream of the calorimeters which, for historical reasons, are designated as M2 to M5. +They are equipped with multi-wire proportional chambers (MWPCs) in order to reconstruct the particle trajectories. +By taking advantage of their penetrating power, a robust identification of muons is possible, which is achieved with the help of interleaved iron walls between the stations. +The iron shielding is also the reason that no major changes are required in order to be operated at higher luminosities. +One exception to this is the muon station M1 that was installed in front of the calorimeters in the initial \lhcbexperiment{}. +Since it cannot withstand the huge hit occupancy expected at this location starting from LHC Run 3, it was removed in the course of the upgrade. +The associated loss of information is marginal, as M1 was mainly used for the now redundant L0 trigger and was not part of the muon identification algorithms~\autocite{pid-tdr}. + + + +\section{Trigger and Data Acquisition} +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/lhcb/Trigger_Diagram} + \caption{ + Trigger schemes for the initial (left) and upgraded \lhcbexperiment{} (right). + Images taken from Ref.~\autocite{trigger-schemes}. + } + \label{fig:trigger} +\end{figure} + +Due to the high bunch crossing rate of \qty{40}{\mega\hertz} at the LHC (\qty{30}{\mega\hertz} after excluding empty bunches), it is not feasible to store every event to disk for later access and analysis. +In fact, during the first years of operation between 2010 and 2018, the readout of the front-end electronics of the complete detector was throttled to only a fraction of that rate. +It was limited to \qty{1}{\mega\hertz} as determined by the first trigger level (L0) implemented in hardware that had only access to the data provided by part of the detector~\autocite{lhcb}. + +However, to take full advantage of the fivefold increase in luminosity starting from LHC Run 3, the trigger scheme had to be revised~\autocite{trigger-tdr}. +As illustrated in \vref{fig:trigger}, the reconstruction of the complete event consisting of the data provided by all sub-detectors is now performed at the collision rate of \qty{30}{\mega\hertz}. +The full event reconstruction and selection is performed in a trigger level that is fully implemented in software, the so-called Software High Level Trigger. +To allow for the \qty{30}{\mega\hertz} readout, the front-end electronics of all sub-detectors had to be renewed as discussed previously. +They are designed to be read out via simplex optical links using a common and custom protocol that is referred to as GBT~\autocite{gbtx}. +A total of about \qty{11000} optical fibres, each carrying up to \qty{4.48}{\giga\bit/s} of user data, transfer the data from the underground cavern to the server farm located on the surface of the LHCb site~\autocite{rainer-links}. +The so-called event builder servers are equipped with custom PCI Express readout cards and are responsible for the event reconstruction~\autocite{pcie40}. + +The reconstructed event information is used by a second cluster of servers referred to as event filter farm. +They have access to a large disk-based buffer and run the selection algorithms in order to filter out the events to be kept for permanent storage~\autocite{trigger-paper}. +The layout of the upgraded LHCb Data Acquisition (DAQ) system is shown in \vref{fig:daq-system}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/lhcb/DAQ} + \caption{ + Layout of the DAQ system of the upgraded \lhcbexperiment{}. + Image adapted from Ref.~\autocite{trigger-paper}. + } + \label{fig:daq-system} +\end{figure} + +The detector front-end electronics and the readout cards are synchronised to the \qty{40}{\mega\hertz} LHC clock by the Timing and Fast Control (TFC) system~\autocite{tfc}. +The distribution of the information is also done via optical links and the help of dedicated interface cards. +An additional \numproduct{2 x 2300} bidirectional optical fibres are used for this purpose to enable the communication with the front-end electronics in the LHCb underground cavern~\autocite{rainer-links}. +By using the GBT protocol, the bandwidth along with the identical interface cards are shared for the implementation of the Experiment Control System (ECS). +While the TFC distributes time-sensitive information to the different components within the DAQ system, the ECS is used for slow-control operations. +These include for example the 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Kopciewicz and T. Szumlak and M. Majewski and K. Akiba and O. Augusto and J. Back and D.S. Bobulska and G. Bogdanova and S. Borghi and T. Bowcock and J. Buytaert and E. Lemos Cid and V. Coco and P. Collins and E. Dall{\textquotesingle}Occo and K. de Bruyn and S. de Capua and F. Dettori and K. Dreimanis and D. Dutta and L. Eklund and T. Evans and M. Ferro-Luzzi and W. Funk and L. Meyer Garcia and O. Boente Garc{\'{\i}}a and M. Gersabeck and T. Gershon and C. Sanchez Graz and K. Hennessy and W. Hulsbergen and D. Hutchcroft and D. Hynds and P. Jalocha and M. John and N. Jurik and I. Kostiuk and T. Latham and A. Leflat and V. Franco Lima and F. Marinho and L. H. Mendes and M. Merk and A. Morris and D. Murray and S. Naik and I. Nasteva and A. Oblakowska-Mucha and J. Otalora and C. Parkes and B.G. Plana and A. Fern{\'{a}}ndez Prieto and B. Rachwal and P. V{\'{a}}zquez Regueiro and K. Rinnert and G. Rodrigues and L. Scantlebury-Smead and M. Schiller and H. Schindler and T. Shears and A. Snoch and P. Svihra and A. Gallas Torreira and M. Van Beuzekom and J. Velthuis and V. Volkov and M. Williams}, + title = "{The upgrade I of {LHCb} {VELO}{\textemdash}towards an intelligent monitoring platform}", + journal = {Journal of Instrumentation}, +} + +@article{velo-paper2, + title = "{LHCb VELO upgrade}", + journal = {Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment}, + volume = {845}, + pages = {97-100}, + year = {2017}, + note = {Proceedings of the Vienna Conference on Instrumentation 2016}, + issn = {0168-9002}, + doi = {https://doi.org/10.1016/j.nima.2016.04.077}, + %url = {https://www.sciencedirect.com/science/article/pii/S016890021630290X}, + author = {Karol Hennessy}, + keywords = {LHCb, VELO, Silicon detector, Pixel, VeloPix, Microchannels, Radiation hard}, +} + +@techreport{velo-tdr, + author = "{LHCb Collaboration}", + title = "{LHCb VELO Upgrade Technical Design Report}", + reportNumber = "CERN-LHCC-2013-021, LHCB-TDR-013", + month = "Nov", + year = "2013", + url = "https://cds.cern.ch/record/1624070", +} + +@article{ut, + author = "Carli, Ina", + title = "{Upstream Tracker - The silicon strip tracking detector + for the LHCb Upgrade}", + journal = "PoS", + collaboration = "LHCb Collaboration", + volume = "ICHEP2020", + pages = "724. 5 p", + year = "2021", + %url = "https://cds.cern.ch/record/2783293", + doi = "10.22323/1.390.0724", +} + + +@techreport{pid-tdr, + author = "{LHCb Collaboration}", + title = "{LHCb PID Upgrade Technical Design Report}", + reportNumber = "CERN-LHCC-2013-022, LHCB-TDR-014", + month = "Nov", + year = "2013", + url = "https://cds.cern.ch/record/1624074", +} + +@article{rich-paper, + title = "{The upgrade of the LHCb RICH detectors}", + journal = {Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment}, + volume = {952}, + pages = {161688}, + year = {2020}, + note = {10th International Workshop on Ring Imaging Cherenkov Detectors (RICH 2018)}, + issn = {0168-9002}, + doi = {https://doi.org/10.1016/j.nima.2018.12.003}, + %url = {https://www.sciencedirect.com/science/article/pii/S0168900218318011}, + author = {Massimiliano Fiorini}, + keywords = {Ring Imaging Cherenkov detectors, Single-photon detectors, Fast front-end electronics}, +} + +@article{claro, + doi = {10.1088/1748-0221/12/08/p08019}, + %url = {https://doi.org/10.1088/1748-0221/12/08/p08019}, + year = 2017, + month = {aug}, + publisher = {{IOP} Publishing}, + volume = {12}, + number = {08}, + pages = {P08019--P08019}, + author = {M. Baszczyk and P. Carniti and L. Cassina and A. Cotta Ramusino and P. Dorosz and M. Fiorini and C. Gotti and W. Kucewicz and R. Malaguti and G. Pessina}, + title = {{CLARO}: an {ASIC} for high rate single photon counting with multi-anode photomultipliers}, + journal = {Journal of Instrumentation}, +} + +@article{calo-paper, + author = "Guz, Yu", + title = "{LHCb Calorimeter Upgrade}", + reportNumber = "LHCb-PROC-2013-051, CERN-LHCb-PROC-2013-051", + pages = "8 p", + month = "Sep", + year = "2013", + url = "https://cds.cern.ch/record/1602198", +} + +@techreport{trigger-tdr, + title = "{LHCb Trigger and Online Upgrade Technical Design Report}", + author = "{LHCb Collaboration}", + reportNumber = "CERN-LHCC-2014-016, LHCB-TDR-016", + month = "May", + year = "2014", + url = "https://cds.cern.ch/record/1701361", +} + +@article{trigger-paper, + doi = {10.1088/1742-6596/1085/3/032041}, + %url = {https://doi.org/10.1088/1742-6596/1085/3/032041}, + year = 2018, + month = {sep}, + publisher = {{IOP} Publishing}, + volume = {1085}, + pages = {032041}, + author = {T Colombo and A Amihalachioaei and K Arnaud and F Alessio and L Brarda and J-P Cachemiche and D C{\'{a}}mpora and S Cap and L Cardoso and F Cindolo and M Daoudi and P Durante and P-Y Duval and C Faerber and P Fern{\'{a}}ndez and M Frank and D Galli and C Gaspar and F Hachon and M Jevaud and B Jost and R Le Gac and M Manzali and U Marconi and H Mohammed and N Neufeld and F Pisani and L Promberger and C Quast and F R{\'{e}}thor{\'{e}} and F Sborzacchi and R Schwemmer and S T'jampens and S Valat and J Viana Barbosa and B Vöneki and G Vouters}, + title = {The {LHCb} Online system in 2020: trigger-free read-out with (almost exclusively) off-the-shelf hardware}, + journal = {Journal of Physics: Conference Series}, +} + +@techreport{tfc, + author = "Alessio, Federico and Jacobsson, Richard", + title = "{System-level Specifications of the Timing and Fast + Control system for the LHCb Upgrade}", + institution = "CERN", + address = "Geneva", + reportNumber = "LHCb-PUB-2012-001, CERN-LHCb-PUB-2012-001", + month = "Feb", + year = "2014", + url = "https://cds.cern.ch/record/1424363", +} + + +% SciFi chapter +@techreport{upgrade-loi, + title = "{Letter of Intent for the LHCb Upgrade}", + author = "{LHCb Collaboration}", + institution = "CERN", + address = "Geneva", + number = "CERN-LHCC-2011-001. LHCC-I-018", + month = "Mar", + year = "2011", + number = "CERN-LHCC-2011-001", + url = "http://cds.cern.ch/record/1333091", +} + +@techreport{scifi-tdr, + author = "{LHCb Collaboration}", + title = "{LHCb Tracker Upgrade Technical Design Report}", + number = "CERN-LHCC-2014-001. LHCB-TDR-015", + month = "2", + year = "2014", + url = "https://cds.cern.ch/record/1647400", +} + + +@techreport{ot-tdr, + author = "{LHCb Collaboration}", + title = "{LHCb outer tracker: Technical Design Report}", + publisher = "CERN", + %address = "Geneva", + series = "Technical Design Report LHCb", + year = "2001", + number = "CERN-LHCC-2001-024", + url = "https://cds.cern.ch/record/519146", +} + + +@techreport{it-tdr, + title = "{LHCb inner tracker: Technical Design Report}", + publisher = "CERN", + author = "{LHCb Collaboration}", + %address = "Geneva", + series = "Technical Design Report LHCb", + year = "2002", + number = "CERN-LHCC-2002-029", + url = "https://cds.cern.ch/record/582793", + %note = "revised version number 1 submitted on 2002-11-13 14:14:34", +} + + +@article{ot-performance, + author = "Arink, R. and others", + title = "{Performance of the LHCb Outer Tracker}", + journal = "JINST", + volume = "9", + pages = "P01002", + doi = "10.1088/1748-0221/9/01/P01002", + year = "2014", + %eprint = "1311.3893", + archivePrefix = "arXiv", + primaryClass = "physics.ins-det", + %report = "LHCB-DP-2013-003", +} + +@article{ot-performance-improved, + author = "d'Argent, Ph. and others", + title = "{Improved performance of the LHCb Outer Tracker in LHC Run 2}", + year = "2017", + %eprint = "1708.00819", + archivePrefix = "arXiv", + primaryClass = "physics.ins-det", + %report = "LHCb-DP-2017-001", + journal = "JINST", + volume = "12", + pages = "P11016", + doi = "10.1088/1748-0221/12/11/P11016", +} + +@article{it-performance, + title = "{Performance of LHCb Silicon Tracker Detector in the LHC}", + journal = "Physics Procedia", + volume = "37", + pages = "851 - 858", + year = "2012", + note = "Proceedings of the 2nd International Conference on Technology and Instrumentation in Particle Physics (TIPP 2011)", + issn = "1875-3892", + doi = "https://doi.org/10.1016/j.phpro.2012.04.097", + %url = "http://www.sciencedirect.com/science/article/pii/S1875389212017798", + author = "Johan Luisier", +} + +@online{scifi-conference-material, + author = "{LHCb Scintillating Fibre Tracker Collaboration}", + title = "Material for conferences", + url = "https://twiki.cern.ch/twiki/bin/view/LHCb/SciFiConference#Material_for_conferences", + urldate = "2021-05-06", +} + +@incollection{scintillation-process, + title = {CHAPTER 3 - THE SCINTILLATION PROCESS IN ORGANIC MATERIALS}, + booktitle = {The Theory and Practice of Scintillation Counting}, + publisher = {Pergamon}, + pages = {39-67}, + year = {1964}, + series = {International Series of Monographs in Electronics and Instrumentation}, + isbn = {978-0-08-010472-0}, + doi = {https://doi.org/10.1016/B978-0-08-010472-0.50008-2}, + %url = {https://www.sciencedirect.com/science/article/pii/B9780080104720500082}, + author = {{J.B. Birks}} +} + +@phdthesis{gavardi-diss, + author = {Laura Gavardi}, + title = {{Studies for the LHCb SciFi Tracker}}, + month = 10, + year = 2017, + school = {Technische Universit{\"a}t Dortmund}, + type = {Dissertation}, + doi = {10.17877/DE290R-18775}, + %download-url = {https://eldorado.tu-dortmund.de/bitstream/2003/36774/1/Dissertation_Gavardi.pdf} +} + +@phdthesis{janine-diss, + author = {Janine Menne}, + title = {{The LHCb SciFi Tracker: studies on scintillating fibres and development of quality assurance procedures for the SciFi serial production}}, + month = 3, + year = 2018, + school = {Technische Universit{\"a}t Dortmund}, + type = {Dissertation}, + doi = {10.17877/DE290R-18868}, + %download-url = {https://eldorado.tu-dortmund.de/bitstream/2003/36869/1/Dissertation_Menne.pdf} +} + + +@article{fibre-qa, + doi = {10.1088/1748-0221/13/10/p10025}, + %url = {https://doi.org/10.1088/1748-0221/13/10/p10025}, + year = 2018, + month = {oct}, + publisher = {{IOP} Publishing}, + volume = {13}, + number = {10}, + pages = {P10025--P10025}, + author = {A.B.R. Cavalcante and B. Dey and L. Gavardi and L. Gruber and C. Joram and R. Kristic and O. Shinji and V. Zhukov}, + title = {Refining and testing 12,000 km of scintillating plastic fibre for the {LHCb} {SciFi} tracker}, + journal = {Journal of Instrumentation}, +} + +@online{kuraray, + author = "{Kuraray Co., Ltd.}", + title = "{Plastic Scintillating Fibers (Materials and Structures)}", + url = "http://kuraraypsf.jp/psf/index.html", + urldate = "2021-06-10", +} + +@article{foerster-transfer, + ISSN = {04858611}, + URL = {http://www.jstor.org/stable/3583604}, + author = {Th. Förster}, + journal = {Radiation Research Supplement}, + number = {}, + pages = {326--339}, + publisher = {Radiation Research Society}, + title = {Transfer Mechanisms of Electronic Excitation Energy}, + volume = {2}, + year = {1960} +} + +@article{scifi-reabsorption, + author = {Ruchti, R. C.}, + title = {THE USE OF SCINTILLATING FIBERS FOR CHARGED-PARTICLE TRACKING}, + journal = {Annual Review of Nuclear and Particle Science}, + volume = {46}, + number = {1}, + pages = {281-319}, + year = {1996}, + doi = {10.1146/annurev.nucl.46.1.281}, + %URL = {https://doi.org/10.1146/annurev.nucl.46.1.281}, + %eprint = {https://doi.org/10.1146/annurev.nucl.46.1.281} +} + +@techreport{hot-shrinking, + author = "Rodrigues Cavalcante, Ana Barbara and Garnier, Francois + and Gavardi, Laura and Joram, Christian and Kristic, Robert + and Pierschel, Gerhard and Schneider, Thomas", + title = "{Shrinking of bumps by drawing scintillating fibres + through a hot conical tool}", + institution = "CERN", + address = "Geneva", + reportNumber = "LHCb-PUB-2016-010, CERN-LHCb-PUB-2016-010", + month = "Apr", + year = "2016", + url = "http://cds.cern.ch/record/2144875", +} + +@techreport{fibre-modules-design-review, + author = "Joram, Christian and Uwer, Ulrich and Leverington, Blake + Dean and Kirn, Thomas and Bachmann, Sebastian and Ekelhof, + Robert Jan and Müller, Janine", + title = "{LHCb Scintillating Fibre Tracker Engineering Design + Review Report: Fibres, Mats and Modules}", + institution = "CERN", + address = "Geneva", + reportNumber = "LHCb-PUB-2015-008, CERN-LHCb-PUB-2015-008", + month = "Mar", + year = "2015", + url = "https://cds.cern.ch/record/2004811", +} + + +@inbook{cnn, + author = {LeCun, Yann and Bengio, Yoshua}, + title = {Convolutional Networks for Images, Speech, and Time Series}, + year = {1998}, + isbn = {0262511029}, + publisher = {MIT Press}, + address = {Cambridge, MA, USA}, + booktitle = {The Handbook of Brain Theory and Neural Networks}, + pages = {255–258}, + numpages = {4}, + %url = "https://dl.acm.org/doi/10.5555/303568.303704" + doi = "10.5555/303568.303704" +} + + +@article{pdg, + author = "{Particle Data Group}", + title = "{Review of Particle Physics}", + doi = "10.1093/ptep/ptaa104", + journal = "PTEP", + volume = "2020", + number = "8", + pages = "083C01", + year = "2020" +} + + + +@techreport{fibre-mirrors, + author = "Joram, Christian and Schneider, Thomas", + title = "{Mirroring of fibre ends for the LHCb SciFi project}", + institution = "CERN", + address = "Geneva", + reportNumber = "LHCb-PUB-2014-020, CERN-LHCb-PUB-2014-020, + LHCb-INT-2013-060", + month = "Feb", + year = "2014", + url = "https://cds.cern.ch/record/1662543", +} + +@techreport{revised-geometry, + author = "Uwer, Ulrich", + title = "{Revised SciFi stereo-layer geometry}", + institution = "CERN", + address = "Geneva", + reportNumber = "LHCb-INT-2017-010, CERN-LHCb-INT-2017-010", + month = "May", + year = "2017", + url = "https://cds.cern.ch/record/2264922", +} + +@unpublished{lis, + title = "{Light injection system performance and production}", + author = "Waclaw Karpinski", + year = "2018", + note = "{SciFi Front-End Electronics Production Readiness Review}", + url = "https://indico.cern.ch/event/690897/", +} + +@unpublished{fee-qa, + title = "{Master Board, Cluster Board and PACIFIC Board Production}", + author = "Vink, Wilco and Perret, Pascal and Han, Xiaoxue", + year = "2018", + note = "{SciFi Front-End Electronics Production Readiness Review}", + url = "https://indico.cern.ch/event/690897/", +} + +@techreport{fee-engineering-design-review, + author = "Joram, Christian and Uwer, Ulrich", + title = "{LHCb Scintillating Fibre Tracker Engineering Design + Review: Frontend Electronics}", + institution = "CERN", + address = "Geneva", + reportNumber = "LHCb-PUB-2016-012, CERN-LHCb-PUB-2016-012", + month = "Jun", + year = "2016", + url = "https://cds.cern.ch/record/2147967", +} + +@phdthesis{axel-diss, + title = "{Development and Characterisation of Silicon Photomultiplier Multichannel Arrays for the Readout of a Large Scale Scintillating Fibre Tracker}", + author = {Kuonen, Axel}, + institution = {IPHYS}, + publisher = {EPFL}, + address = {Lausanne}, + pages = {163}, + year = {2018}, + %url = {http://infoscience.epfl.ch/record/256964}, + doi = {10.5075/epfl-thesis-8842}, +} + +@phdthesis{olivier-diss, + title = "{Development of the scintillating fibre tracker technology for the LHCb upgrade and the LHC beam profile monitoring system}", + author = {Girard, Olivier Göran}, + institution = {IPHYS}, + publisher = {EPFL}, + address = {Lausanne}, + pages = {140}, + year = {2018}, + %url = {http://infoscience.epfl.ch/record/258081}, + doi = {10.5075/epfl-thesis-8851}, +} + +@unpublished{sipm-specifications, + title = "{SiPM S13552-H2017 Delivery Specification Sheet}", + author = "{Hamamatsu Photonics K.K.}", + year = "2016", + month = "October", + note = "CERN Engineering Data Management Service (EDMS), Internal access", + url = "https://edms.cern.ch/document/1742017/1", +} + +@article{sipm-for-scifi, + title="{Characterisation of silicon photomultipliers based on statistical analysis of pulse-shape and time distributions}", + author={Olivier Girard and Guido Haefeli and Axel Kuonen and Luca Pescatore and Olivier Schneider and Maria Elena Stramaglia}, + year={2018}, + eprint={1808.05775}, + archivePrefix={arXiv}, + primaryClass={physics.ins-det} +} + +@techreport{sipm-technical-guide, + author = "Ardavan Ghassemi and Kota Kobayashi and Kenichi Sato", + title = "{A technical guide to silicon photomultipliers (MPPC)}", + institution = "Hamamatsu Photonics K.K.", + month = "Jan", + year = "2018", + url = "https://hub.hamamatsu.com/us/en/technical-note/sipm.html", +} + +@article{fee-design, + doi = {10.1088/1748-0221/12/03/c03053}, + %url = {https://doi.org/10.1088/1748-0221/12/03/c03053}, + year = {2017}, + month = {mar}, + publisher = {{IOP} Publishing}, + volume = {12}, + number = {03}, + pages = {C03053--C03053}, + author = {W.E.W. Vink and A. Pellegrino and G.C.M. Ietswaard and J.C. Verkooijen and U. Carneiro and A. Massefferi}, + title = "{LHCb Scintillating Fiber detector front end electronics design and quality assurance}", + journal = {Journal of Instrumentation}, +} + +@article{pacific-paper, + title = "{PACIFIC: SiPM readout ASIC for LHCb upgrade}", + journal = {Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment}, + volume = {912}, + pages = {354-358}, + year = {2018}, + note = {New Developments In Photodetection 2017}, + issn = {0168-9002}, + doi = {https://doi.org/10.1016/j.nima.2017.12.044}, + %url = {https://www.sciencedirect.com/science/article/pii/S0168900217314377}, + author = {José Mazorra {de Cos} and Hervé Chanal and Albert {Comerma Montells} and David {Gascón Fora} and Sergio {Gómez Fernández} and Xiaoxue Han and Nicolas Pillet and Richard Vandaelle}, + keywords = {ASIC, Tracker, LHCb, SiPM}, +} + +@INPROCEEDINGS{pacific-paper-albert, + author={Comerma, Albert}, + booktitle={2017 IEEE Nuclear Science Symposium and Medical Imaging Conference (NSS/MIC)}, + title="{PACIFIC: The Readout ASIC for the LHCb Scintillating Fibre Tracker}", + year={2017}, + volume={}, + number={}, + pages={1-3}, + doi={10.1109/NSSMIC.2017.8532693} +} + + +@phdthesis{guido-diss, + author = "Haefeli, G", + title = "{Contribution to the development of the acquisition + electronics for the LHCb experiment}", + year = "2004", + url = "http://cds.cern.ch/record/800810", + note = "Presented on Aug 2004", +} + +@unpublished{pb-edms, + title = "{PACIFICr5 Carrier Board (v4)}", + author = "{LHCb Scintillating Fibre Tracker Collaboration}", + year = "2018", + note = "CERN Engineering Data Management Service (EDMS), Internal access", + url = "https://edms.cern.ch/document/2001668/1", +} + +@techreport{pacific-datasheet, + author = "Comerma Montells, Albert and Mazorra De Cos, Jose", + title = "{PACIFICr5 ASIC Data Sheet}", + institution = "CERN", + address = "Geneva", + reportNumber = "LHCb-PUB-2021-006, CERN-LHCb-PUB-2021-006", + month = "May", + year = "2021", + url = "https://cds.cern.ch/record/2766810", +} + +@phdthesis{albert-diss, + author = "Comerma Montells, Albert", + title = "{Development of a multichannel integrated circuit for Silicon Photo-Multiplier arrays readout}", + institution = "Universitat de Barcelona", + year = "2013", + note = "Presented on Jan 2014", + url = "http://hdl.handle.net/10803/134876" +} + +@unpublished{pacific-presentation-herve, + title = "{PACIFIC: SiPM Readout ASIC for the LHCb Upgrade}", + author = "Chanal, H. and Comerma, A. and Gascón, D. and Gómez, S. and Han, X. and Mazorra, J. and Pillet, N. and Vandaele, R.", + year = "2018", + month = "May", + note = "{11th International Meeting on Front-End Electronics}", + url = "https://indico.cern.ch/event/688153/" +} + +@techreport{maraton, + author = "{W-IE-NE-R Power Electronics GmbH}", + title = "{MARATON Power Supply System - Technical Manual}", + month = "Jan", + year = "2019", + url = "https://file.wiener-d.com/documentation/MARATON/WIENER_MARATON_HighRad_Manual_A2.pdf" +} + +@techreport{caen-module, + author = "{CAEN S.p.A.}", + title = "{A1539, AG539, A154X, AG54X Power Supply Boards Manual (Rev. 11)}", + month = "Feb", + year = "2021", + url = "https://www.caen.it/products/a1539b" +} + +@techreport{caen-crate, + author = "{CAEN S.p.A.}", + title = "{SY4527 - SY4527LC Power Supply Systems Manual (Rev. 21)}", + month = "May", + year = "2021", + url = "https://www.caen.it/products/sy4527" +} + +@unpublished{water-cooling-requirements, + title = "{Requirements for the LHCb SciFi water cooling system}", + author = "Joram, C. and Insa C. and Sciuccati A.", + year = "2018", + month = "March", + note = "CERN Engineering Data Management Service (EDMS), Internal access", + number = "EDMS 1919838 v.2", + url = "https://edms.cern.ch/document/1919838/2" +} + +@unpublished{c-frames, + title = "{C-Frames: Mechnics and Services}", + author = "Blake Dean Leverington", + year = "2017", + month = "September", + note = "{SciFi General Meeting}", + url = "https://indico.cern.ch/event/664962/" +} + + +@ARTICLE{jtag-standard, + author={}, + journal={IEEE Std 1149.1-2013 (Revision of IEEE Std 1149.1-2001)}, + title="{IEEE Standard for Test Access Port and Boundary-Scan Architecture}", + year={2013}, + volume={}, + number={}, + pages={1-444}, + doi={10.1109/IEEESTD.2013.6515989} +} + +@unpublished{clusterboard-manual, + title = "{LHCb SciFi Clusterization Board specifications and manual}", + author = "Vink, Wilco", + year = "2021", + month = "June", + note = "Nikhef Redmine, Internal access", + url = "https://redmine.nikhef.nl/et/projects/clusterization_board" +} + +@techreport{clustering-note, + author = "Esen, Sevda and Van Tilburg, Jeroen and Del Buono, Luigi + and Billoir, Pierre and Henry, Louis", + title = "{Clustering and rawbank decoding for the SciFi detector}", + institution = "CERN", + address = "Geneva", + reportNumber = "LHCb-INT-2018-024, CERN-LHCb-INT-2018-024", + month = "Jul", + year = "2018", + url = "https://cds.cern.ch/record/2630154", +} + +@unpublished{masterboard-manual, + title = "{Master Board, technical manual}", + author = "Vink, Wilco", + year = "2021", + month = "February", + note = "Nikhef Redmine, Internal access", + url = "https://redmine.nikhef.nl/et/projects/master_board_v2" +} + +@unpublished{mb-edms, + title = "{Master Board (v4)}", + author = "Vink, Wilco", + year = "2019", + month = "May", + note = "CERN Engineering Data Management Service (EDMS), Internal access", + number = "2150024 v.1", + url = "https://edms.cern.ch/document/2150024/1" +} + +@unpublished{fe-box-mechanics, + title = "{Front-End Electronics Mechanics}", + author = "Insa, Christophe", + year = "2019", + month = "March", + note = "CERN Engineering Data Management Service (EDMS)", + number = "1759287 v.1", + url = "https://edms.cern.ch/document/1759287/1", +} + +% ----------- +% --- GBT --- +% ----------- +@article{gbtx, + author = "Moreira, P and Marchioro, A and Kloukinas", + title = "{The GBT: A proposed architecure for multi-Gb/s data + transmission in high energy physics}", + year = "2007", + %url = "https://cds.cern.ch/record/1091474", + doi = "10.5170/CERN-2007-007.332", +} + +@article{gbt-sca, + author = "Caratelli, A and Bonacini, S and Kloukinas, K and + Marchioro, A and Moreira, P and De Oliveira, R and + Paillard, C", + title = "{The GBT-SCA, a radiation tolerant ASIC for detector + control and monitoring applications in HEP experiments}", + journal = "JINST", + reportNumber = "03", + volume = "10", + pages = "C03034", + year = "2015", + %url = "https://cds.cern.ch/record/2158969", + doi = "10.1088/1748-0221/10/03/C03034", +} + +@techreport{gbt-sca-manual, + author = "Caratelli, Alessandro and H. Montesinos, Daniel and Kloukinas, Kostas", + title = "{GBT-SCA User Manual}", + note = "Internal access", + year = "2019", + url = "https://espace.cern.ch/GBT-Project/GBT-SCA", +} + +@techreport{gbtx-manual, + author = "Moreira, P. and Christiansen, J. and Wyllie, K.", + title = "{GBTX Manual}", + note = "Internal access", + year = "2021", + url = "https://espace.cern.ch/GBT-Project/GBTX", +} + +@article{gbt-project, + author = "Moreira, P and Ballabriga, R and Baron, S and Bonacini, S + and Cobanoglu, O and Faccio, F and Fedorov, T and + Francisco, R and Gui, P and Hartin, P and Kloukinas, K and + Llopart, X and Marchioro, A and Paillard, C and Pinilla, N + and Wyllie, K and Yu, B", + title = "{The GBT Project}", + year = "2009", + %url = "https://cds.cern.ch/record/1235836", + doi = "10.5170/CERN-2009-006.342", +} + +@article{gbtia, + author = "Menouni, M and Gui, P and Moreira, P", + title = "{The GBTIA, a 5 Gbit/s Radiation-Hard Optical Receiver for + the SLHC Upgrades}", + year = "2009", + %url = "https://cds.cern.ch/record/1235833", + doi = "10.5170/CERN-2009-006.326", +} + +@article{gbld, + author={Mazza, Giovanni and Tavernier, Filip and Moreira, Paulo and Calvo, Daniela and De Remigis, Paolo and Olantera, Lauri and Soos, Csaba and Troska, Jan and Wyllie, Ken}, + journal={IEEE Transactions on Nuclear Science}, + title="{High-Speed, Radiation-Tolerant Laser Drivers in 0.13 µm CMOS Technology for HEP Applications}", + year={2014}, + volume={61}, + number={6}, + pages={3653-3659}, + doi={10.1109/TNS.2014.2361679} +} + +@article{versatile-link-project, + doi = {10.1088/1748-0221/4/12/p12003}, + %url = {https://doi.org/10.1088/1748-0221/4/12/p12003}, + year = 2009, + month = {dec}, + publisher = {{IOP} Publishing}, + volume = {4}, + number = {12}, + pages = {P12003--P12003}, + author = {L Amaral and S Dris and A Gerardin and T Huffman and C Issever and A J Pacheco and M Jones and S Kwan and S -C Lee and Z Liang and T Liu and Z Meng and A Prosser and S Padadopoulos and I Papakonstanstinou and C Sigaud and S Silva and C Soos and P Stejskal and J Troska and F Vasey and P Vichoudis and T Weidberg and A Xiang and J Ye}, + title = {The versatile link, a common project for super-{LHC}}, + journal = {Journal of Instrumentation}, +} + +@techreport{versatile-link-application-note, + author = "Vasey, Francois and others", + title = "{The Versatile Link Application Note}", + number = "Version 2.7", + note = "CERN Engineering Data Management Service (EDMS)", + month = "January", + year = "2017", + url = "https://edms.cern.ch/document/1309737/1" +} + + +@book{reed-solomon, + author = {Lin, Shu and Costello, Daniel}, + year = {2004}, + month = {01}, + pages = {}, + title = {Error Control Coding}, + isbn = {978-1-4613-6787-1}, + doi = {10.1007/978-1-4615-3998-8_3} +} + +@INPROCEEDINGS{gbt-scrambling, + author={Papotti, G.}, + booktitle={2006 Ph.D. Research in Microelectronics and Electronics}, + title="{An Error-Correcting Line Encoding ASIC for a HEP Rad-Hard Multi-GigaBit Optical Link}", + year={2006}, + volume={}, + number={}, + pages={225-228}, + doi={10.1109/RME.2006.1689937} +} + +@ARTICLE{feastmp, + author={Ripamonti, Giacomo and Ursino, Mario and Saggini, Stefano and Michelis, Stefano and Faccio, Federico}, + journal={IEEE Transactions on Power Electronics}, + title={Regulated Resonant Switched-Capacitor Point-of-Load Converter Architecture and Modeling}, + year={2021}, + volume={36}, + number={4}, + pages={4815-4827}, + doi={10.1109/TPEL.2020.3019841} +} + + +@unpublished{mapcern, + author = "{MapCERN}", + year = "2021", + month = "October", + note = "Building 3852", + url = "https://maps.cern.ch/?n=[%273852%27]" +} + + +@unpublished{fe-tester, + author = {Massafferri, A. and Pellegrino, A. and Berninghoff, D. and Ayres, D. and Rocha, U. and Vink, W. and Han, X.}, + title = "{FEE Test System - Read-Out Box Test System Protocol for SciFi Detector}", + year = "2020", + month = "July" +} + +@article{pcie40, + doi = {10.1088/1748-0221/11/02/p02013}, + %url = {https://doi.org/10.1088/1748-0221/11/02/p02013}, + year = 2016, + month = {feb}, + publisher = {{IOP} Publishing}, + volume = {11}, + number = {02}, + pages = {P02013--P02013}, + author = {J.P. Cachemiche and P.Y. Duval and F. Hachon and R. Le Gac and F. R{\'{e}}thor{\'{e}}}, + title = {The {PCIe}-based readout system for the {LHCb} experiment}, +} + +@unpublished{wincc-oa, + author = "{ETM professional control GmbH}", + address = "Eisenstadt, Austria", + title = "{SIMATIC WinCC Open Architecture}", + url = "http://etm.at" +} + +@INPROCEEDINGS{lhcb-scada, + author={Cardoso, Luis G. and Gaspar, Clara and Barbosa, João V. V. and Alessio, Federico}, + booktitle={2016 IEEE-NPSS Real Time Conference (RT)}, + title="{Controlling DAQ electronics using a SCADA framework}", + year={2016}, + volume={}, + number={}, + pages={1-4}, + doi={10.1109/RTC.2016.7543123} +} + +@techreport{jcop, + author = "Holme, Oliver and González-Berges, Manuel and Golonka, + Piotr and Schmeling, Sascha", + title = "{The JCOP Framework}", + institution = "CERN", + address = "Geneva", + reportNumber = "CERN-OPEN-2005-027", + month = "Sep", + year = "2005", + url = "https://cds.cern.ch/record/907906", +} + +@unpublished{capacitor-boards, + title = "{LV 10mF Capacitor Board production files}", + author = {Vink, Wilco}, + year = "2020", + month = "May", + note = "Nikhef Redmine, Internal access", + url = "https://redmine.nikhef.nl/et/documents/192" +} + +@unpublished{scifi-db, + title = "{LHCb SciFi Production Database}", + note = "Internal access", + url = "https://scifi.physi.uni-heidelberg.de" +} + +@techreport{fe-dataformat, + title = "{LHCb Upgrade SciFi Tracker Front‐End Data Format}", + author = "Del Buono, Luigi and Chanal, Hervé and Le Dortz, Olivier and Pellegrino, Antonio and Vink, Wilco", + year = "2021", + month = "May", + note = "CERN Engineering Data Management Service (EDMS)", + number = "1898940 v.4", + url = "https://edms.cern.ch/document/1898940/4" +} + + +@article{poster-rainer, + doi = {10.1088/1748-0221/9/03/c03030}, + %url = {https://doi.org/10.1088/1748-0221/9/03/c03030}, + year = 2014, + month = {mar}, + publisher = {{IOP} Publishing}, + volume = {9}, + number = {03}, + pages = {C03030--C03030}, + author = {R Schwemmer and J P Cachemiche and N Neufeld and C Soos and J Troska and K Wyllie}, + title = "{Evaluation of 400 m, 4.8 Gbit/s Versatile Link lengths over OM3 and OM4 fibres for the LHCb upgrade}", + journal = {Journal of Instrumentation}, +} + +@misc{rainer-links, + author = "Schwemmer, Rainer", + date = "2020-10-22", + howpublished = "personal communication" +} + +@techreport{minipods-datasheet, + title = "{MiniPOD\textsuperscript{TM} AFBR-811VxyZ, AFBR-821VxyZ Datasheet}", + author = "{Avago Technologies}", + year = "2013", + month = "March", + number = "AV02-2842EN", + url = "https://docs.broadcom.com/doc/AV02-2842EN", +} + +@techreport{power-meter, + author = "{Fluke Networks}", + title = "{MultiFiber\textsuperscript{TM} Pro Datasheet}", + month = "9", + year = "2020", + url = "https://www.flukenetworks.com/content/datasheet-multifiber-pro", +} + +@unpublished{vtrx-issue, + title = "{Status of VTRX issue}", + author = "Wyllie, Ken", + year = "2021", + month = "5", + note = "{LHCb Technical Board Meeting}", + url = "https://indico.cern.ch/event/1040629/", +} + +@techreport{eye-diagram, + title = "{Understanding Data Eye Diagram Methodology for Analyzing High Speed Digital Signals}", + author = "{Semiconductor Components Industries}", + year = "2015", + month = "June", + %number = "AND9075/D", + url = "https://www.onsemi.com/pub/collateral/and9075-d.pdf", +} + +@unpublished{lukas-poster, + title = "{Readout Electronics for the LHCb Scintillating Fibre Tracker}", + author = "Witola, Lukas", + year = "2019", + month = "June", + note = "Poster", + url = "https://indico.cern.ch/event/827947/" +} + +@mastersthesis{lukas-thesis, + author = {Witola, Lukas}, + school = {University of Heidelberg}, + title = "{Calibration and performance studies of the readout ASIC for the LHCb SciFi Tracker}", + year = 2019, + url = "https://www.physi.uni-heidelberg.de/Publications/MA_Witola.pdf", +} + +@article{generalised-poisson, + author = { P. C. Consul and G. C. Jain }, + title = "{A Generalization of the Poisson Distribution}", + journal = {Technometrics}, + volume = {15}, + number = {4}, + pages = {791-799}, + year = {1973}, + publisher = {Taylor & Francis}, + doi = {10.1080/00401706.1973.10489112}, + %URL = {https://www.tandfonline.com/doi/abs/10.1080/00401706.1973.10489112}, +} + +@misc{sipm-model, + title="{Photon detection efficiency of Geiger-mode avalanche photodiodes}", + author={Simonetta Gentile and Ekaterina Kuznetsova and Franco Meddi}, + year={2010}, + eprint={1006.3263}, + archivePrefix={arXiv}, + primaryClass={physics.ins-det} +} + +@article{sps-north-area, + author = "Banerjee, Dipanwita and Bernhard, Johannes and Brugger, + Markus and Charitonidis, Nikolaos and Doble, Niels and + Gatignon, Lau and Gerbershagen, Alexander", + title = "{The North Experimental Area at the Cern Super Proton + Synchrotron}", + month = "Jul", + year = "2021", + url = "https://cds.cern.ch/record/2774716", +} + +@InProceedings{minidaq, + author="Durante, Paolo + and Cachemiche, Jean-Pierre + and Vouters, Guillaume + and Alessio, Federico + and Cardoso, Luis Granado + and Barbosa, Joao Vitor Viana + and Neufeld, Niko", + editor="Liu, Zhen-An", + title="{MiniDAQ1: A Compact Data Acquisition System for GBT Readout over 10G Ethernet at LHCb}", + booktitle="Proceedings of International Conference on Technology and Instrumentation in Particle Physics 2017", + year="2018", + publisher="Springer Singapore", + address="Singapore", + pages="332--336", + isbn="978-981-13-1313-4" +} + +@article{timepix, + title = "{The Timepix Telescope for high performance particle tracking}", + journal = {Nuclear Instruments and Methods in Physics Research Section A: Accelerators, Spectrometers, Detectors and Associated Equipment}, + volume = {723}, + pages = {47-54}, + year = {2013}, + issn = {0168-9002}, + doi = {https://doi.org/10.1016/j.nima.2013.04.060}, + %url = {https://www.sciencedirect.com/science/article/pii/S0168900213004816}, + author = {K. Akiba and P. Ronning and M. {van Beuzekom} and V. {van Beveren} and S. Borghi and H. Boterenbrood and J. Buytaert and P. Collins and A. {Dosil Suárez} and R. Dumps and L. Eklund and D. Esperante and A. Gallas and H. Gordon and B. {van der Heijden} and C. Hombach and D. Hynds and M. John and A. Leflat and Y. Li and I. Longstaff and A. Morton and N. Nakatsuka and A. Nomerotski and C. Parkes and E. {Perez Trigo} and R. Plackett and M.M. Reid and P. {Rodriguez Perez} and H. Schindler and T. Szumlak and P. Tsopelas and C. {Vázquez Sierra} and J. Velthuis and M. Wysokiński}, + keywords = {Particle Tracking, Timepix, LHCb, VELO, Silicon pixel sensors, Vertexing, Medipix}, +} + +@article{cern-photos, + author = "Ordan, Julien Marius", + title = "{Transport and installation of four LHCb scintillating + fibre (SciFi) tracker C-frames with detector modules}", + month = "May", + year = "2021", + url = "https://cds.cern.ch/record/2765842", + note = "General Photo", +} + +@unpublished{i2c-specification, + title = "{I$^2$C-bus specification and user manual}", + author = "{NXP Semiconductors}", + year = "2021", + month = "October", + url = "https://www.nxp.com/docs/en/user-guide/UM10204.pdf", +} + +@article{hamming, + author={Hamming, R. W.}, + journal={The Bell System Technical Journal}, + title={Error detecting and error correcting codes}, + year={1950}, + volume={29}, + number={2}, + pages={147-160}, + doi={10.1002/j.1538-7305.1950.tb00463.x} +} + +@online{wincc-clara, + author = "Gaspar, Clara", + title = "{WinCC-OA Introduction for Newcomers}", + url = {https://lhcb-online.web.cern.ch/ecs/pvssintro.htm}, + urldate = "2022-02-25" +} + +@unpublished{scifi-controls, + title = "{SciFi Tracker Controls and Monitoring - Design of the SciFi ECS}", + author = {Berninghoff, Daniel and Damen, Ton and Feo Rivello, Mauricio and Gruber, Lukas and Han, Xiaoxue and Hart, Robert and Pellegrino, Antonio and Poplawski, Karol and Nanut, Tara}, + year = "2018", + month = "December", + note = "CERN Engineering Data Management Service (EDMS), Internal access", + url = "https://edms.cern.ch/document/2060160", +} + +@techreport{gamma, + title = "{Update of the LHCb combination of the CKM angle + $\gamma$}", + institution = "CERN", + author = "{LHCb Collaboration}", + address = "Geneva", + reportNumber = "LHCb-CONF-2018-002, CERN-LHCb-CONF-2018-002", + month = "May", + year = "2018", + url = "https://cds.cern.ch/record/2319289", +} + +@techreport{Rk, + author = "Aaij, Roel and others", + title = "{Test of lepton universality in beauty-quark decays}", + institution = "CERN", + collaboration = "LHCb Collaboration", + address = "Geneva", + archivePrefix = "arXiv", + %eprint = "2103.11769", + reportNumber = "LHCb-PAPER-2021-004, CERN-EP-2021-042", + month = "Mar", + year = "2021", + url = "https://cds.cern.ch/record/2758740", +} diff --git a/main.tex b/main.tex new file mode 100644 index 0000000..c4bfdc4 --- /dev/null +++ b/main.tex @@ -0,0 +1,50 @@ +% The following settings are inspired from +% https://www.semipol.de/2018/06/12/latex-best-practices.html#building-latex-documents + +% Filter out acceptable warnings that would otherwise flood the error window +\RequirePackage{silence} +\WarningFilter{scrreprt}{Usage of package `titlesec'} +\WarningFilter{scrreprt}{Activating an ugly workaround} +\WarningFilter{titlesec}{Non standard sectioning command detected} +\WarningFilter{microtype}{protrusion codes list} +\WarningFilter{latexfont}{Font} +\WarningFilter{latexfont}{Some font shapes} + +\documentclass[ + paper = a4, + fontsize = 12pt, + BCOR = 10mm, + toc = listofnumbered, + numbers = noenddot, + headings = normal, + listof = leveldown]{scrbook} + +\input{preamble.tex} + +\begin{document} + +\frontmatter + +\input{titlepage} + +\input{abstract} +\cleardoublepage + +\tableofcontents +\cleardoublepage + +\mainmatter +\include{introduction} +\include{lhcb} +\include{scifi} +\include{fee} +%\include{testbeams} +\include{commissioning} +\include{performance} +\include{conclusion} + +\printbibliography[heading=bibintoc] +\include{acknowledgements} + + +\end{document} diff --git a/performance.tex b/performance.tex new file mode 100644 index 0000000..364e27a --- /dev/null +++ b/performance.tex @@ -0,0 +1,349 @@ +\chapter{Performance Studies} +\label{ch:performance} +The performance of the SciFi front-end electronics crucially depends on the digitisation of the SiPM signals as well as the error-free transmission of the data to the DAQ system. +Moreover, it relies on experiencing low noise levels in order to avoid the occurrence of false hits. + +Therefore, in addition to the regular commissioning steps as discussed in \cref{ch:commissioning}, further studies in these areas were performed on individual \cframes{}. +These tests were mainly conducted on \cframe{}~2 that was commissioned at the beginning of 2021 (see \cref{tab:commissioning}). +During that time, the assembly of the next \cframe{} was on hold due to restrictions in the course of the COVID-19 pandemic that did not allow the required international personal to travel from abroad. +As a result, \cframe{}~2 was available for these performance studies at the system level within the commissioning setup (see \cref{sec:commissioning-setup}) for some time. +Due to the limitations in the available DAQ system (see \cref{sec:commissioning-daq}), the presented measurements mostly include the data from only half of the \cframe{} (i.e. one quadrant). +However, this still corresponds to 12 ROBs with a total of 25k channels, i.e. to about \qty{5}{\percent} of the final detector. + + +\section{PACIFIC Pulse Height Digitisation} +The digitisation of the SiPM pulses is a key aspect for the operation of the detector as it is the basis for the reconstruction of hit clusters. +A deep understanding of the analogue processing and digitisation in the PACIFIC ASICs is essential for an accurate calibration of the threshold DACs (see \cref{sec:th_scan}), which is required to achieve high hit efficiencies along with good noise rejection. + + +\subsection{Pedestal Stability} +The PACIFIC integrators play an important role in the analogue processing. +They integrate the signals within each period of \qty{25}{\nano\second} corresponding to the proton bunch crossing intervals. +Without any input signal, the output level is determined by the DC baseline of the integrator. +It is also referred to as pedestal since any additional signal is added to it. +Knowledge about the pedestal level is essential to determine the pulse height, i.e. amplitude, of a given signal. +In addition, it is required that it remains stable after being once determined by means of a PACIFIC threshold scan. + +The stability of the pedestal first came into focus during the last test beam campaign that took place in the summer of 2018 at the CERN SPS (see \cref{sec:testbeam}). +In the course of the two test weeks, occasional shifts of the pedestal positions of up to 40 threshold DACs were noticed. +Compared to a typical photoelectron peak separation of about \qty{15}{DACs}, this far exceeded the expected variations. +Possible explanations are ranging from insufficient grounding to accidental changes in the PACIFIC configurations. +However, up to now, the effect seen in the test beam could not be reproduced or understood. +Among the extensive studies that have been performed in this context are several measurements within the SciFi commissioning setup that are presented in the following. + +As a basis, one has to consider the general variations of the determined pedestal position within each channel. +Between two consecutive threshold scans, the pedestals show deviations as displayed in \vref{fig:pedestal-repeat} for the 25k channels. +The standard deviation of the distribution $\sigma=\qty{0.23}{DACs}$ can be interpreted as the overall uncertainty on the pedestal positions, which are determined according to the illustration in \vref{fig:pedestals}. + +\begin{figure} + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/Pedestal_difference_repeat} + \caption{Consecutive scans} + \label{fig:pedestal-repeat} + \end{subfigure} + \hfill + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/Pedestal_difference_conditions_overview} + \caption{Different conditions} + \label{fig:pedestal-conditions} + \end{subfigure} + \caption{ + Variations of the determined pedestal positions between two consecutive threshold scans (a) and under further conditions (b) for the 25k channels of one \cframe{} half. + The reference scan has been performed with the HV and LIS turned off. + In the right figure (b), the mean values $\mu$ and standard deviations $\sigma$ of the underlying distributions are indicated by the markers and error bars, respectively. + } +\end{figure} + +By performing the threshold scans under different conditions, an attempt was made to reproduce similar pedestal shifts as observed during the 2018 test beam campaign. +Examples showing the largest displacements that could be achieved are given in \vref{fig:pedestal-conditions}. +While power cycling the front-end electronics virtually made no difference compared to two consecutive threshold scans, small biases could be produced in other cases. +When injecting a signal with the help of the internal charge injection mechanism (see following \cref{sec:charge-injection}), the pedestals are systematically shifted by \qty{0.13}{DACs}. +Larger displacements are achieved by biasing the SiPM arrays (\qty{0.28}{DACs}) and additionally enabling the LIS, although without injecting light pulses (\qty{0.43}{DACs}). +However, even these differences are negligible compared to the typical photoelectron peak separation of \qty{15}{DACs} and especially compared to the \qty{40}{DACs} test beam variations. +Therefore, there is no indication that the studied \cframe{} suffers from the problems observed in the test beam. + +\subsection{Internal Charge Injection} +\label{sec:charge-injection} +An important feature for the characterisation of the PACIFICs is the internal charge injection, which is used to simulate the input of SiPM pulses with fixed amplitudes. +It consists of two small on-channel capacitors (nominal \qty{630}{\femto\farad} and \qty{1}{\pico\farad}) that can be discharged through two relatively large resistors (\qty{12}{\kilo\ohm} and \qty{9}{\kilo\ohm}, respectively). +The discharges can be triggered independently via two digital input signals that are controlled by two fast control commands, which are referred to as CalibA and CalibB. +Thereby, three different charge values can be injected into the pre-amplification stage of each channel (see \cref{sec:pacific_preamp}). +The capacitance and resistance value pairs were selected based on simulations that showed good approximations to actual SiPM signal shapes. +Using the slow control of the PACIFIC, any combination of channels can be selected for internal charge injection~\autocite{pacific-datasheet}. + +The internal charge injection is an important debugging tool as it allows to inject signals into the PACIFIC channels without the need of additional hardware. +It is used in particular to examine the per-channel differences between the PACIFIC integrators and comparators as presented in the following \cref{sec:int_differences,sec:comp_differences}. + +\begin{figure} + \centering + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/Scurve_charge} + \caption{ + Typical \Scurve{} when injecting a fixed charge \qty{50}{\percent} of the time using the internal charge injection mechanism for an exemplary PACIFIC channel. + } + \label{fig:scurve-charge} + \end{minipage} + \hfill + \begin{minipage}[t]{0.49\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/performance/Charge_delayscan} + \caption{ + Internal charge injection amplitudes depending on the delay for an exemplary PACIFIC channel. + The amplitudes of the three possible charge values are shown. + } + \label{fig:charge-delayscan} + \end{minipage} +\end{figure} + +\Vref{fig:scurve-charge} shows a typical \Scurve{} in this context. +It is generated by triggering the discharge of the \qty{1}{\pico\farad} capacitor (CalibB) \qty{50}{\percent} of the time. +As a result, two transitions are visible corresponding to the pedestal and charge signal levels. +Thereby, the charge amplitude is given by the difference of the two transitions as illustrated in \vref{fig:scurve-charge}. + +Similar to injected light pulses (see \cref{sec:delayscan-lite}), the total charge accumulated by the PACIFIC integrators strongly depends on the injection delay with respect to the internal clock. +\Vref{fig:charge-delayscan} shows the dependence for the three possible charge values of an exemplary PACIFIC channel. +Within a \qty{40}{\mega\hertz} clock cycle, the delay can be chosen to take eight different values in steps of \qty{3.125}{\ns}, as controlled by a corresponding register of the Cluster FPGA that is responsible for issuing the digital discharge signals to the PACIFICs. +For \qty{80}{\percent} of the examined channels, the maximum amplitude is reached at a delay of \qty{9.375}{\ns}, with the remaining ones peaking at \qty{12.5}{\ns}. +However, as can be seen in \vref{fig:charge-delayscan}, the charge difference between the two central points is relatively small and amounts to about \qty{5}{\percent} on average for all channels. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/performance/Charge_amplitudes} + \caption{ + Amplitude distributions of the three charge values available through the internal charge injection mechanism. + The mean values are indicated by the dashed lines. + } + \label{fig:charge-amplitudes} +\end{figure} + +At the overall best delay of \qty{9.375}{\ns}, the internal charge amplitudes for the 25k channels are distributed as shown in \vref{fig:charge-amplitudes}. +With mean values between \num{23.3} and \qty{55.3}{DACs} for the smallest and largest available charge values, the internal charge injection mechanism covers a similar range as the SiPM signals of 1-4 photoelectrons. +With the default operating thresholds $[1.5, 2.5, 3.5]\,\text{pe}$ lying in the similar range, it is therefore well suited for debugging of the detector. +Since no additional hardware is required, it can also be used in the final detector between normal data taking runs and without manual intervention. + +\subsection{Integrator Differences} +\label{sec:int_differences} +The internal charge injection mechanism is mainly used to characterise the differences between the two integrators of each PACIFIC channel. +This is an important quantity for the operation of the detector since both integrators share the same set of three comparators. +Therefore, a uniform behaviour is required to ensure consistent performance of the two integrators and thus for even and odd events. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/Hysteresis} + \caption{ + Illustration of the switching process of the PACIFIC comparator output depending on the input voltage in the presence of a hysteresis (top). + Shown below are the consequences that arise from it during a threshold scan for the cases where the even and odd integrator levels are within the hysteresis (left) and exceeding it (right). + Note: The output of the integrator (Int.) is fed to the input of the comparator (Comp.). + } + \label{fig:hysteresis} +\end{figure} + +Due to the structure of the PACIFIC comparators, determining the integrator differences requires the use of the internal charge injection. +The reasoning behind that is illustrated in \vref{fig:hysteresis}. +To avoid repetitive switching of the comparator output when the signal level is close to the set threshold, the PACIFIC comparators feature a design with a \qty{10}{\milli\volt} hysteresis. +As a result, there exist two slightly different voltage levels causing the comparator output to change. +Going above $V_\uparrow$ changes its state from $0 \rightarrow 1$, while going below $V_\downarrow$ changes its state from $1 \rightarrow 0$. +The difference $V_\uparrow-V_\downarrow$ is referred to as hysteresis. + +As a consequence, the pedestals might overlap perfectly when performing a threshold scan, even though the baselines might differ by up to \qty{10}{\milli\volt} (see bottom left part of \cref{fig:hysteresis}). +In the default configuration of the PACIFIC ASICs, a \qty{10}{\milli\volt} difference at the comparator input corresponds to about 4 DACs in the threshold scan (see \cref{sec:pacific_digitisation}). +To determine the integrator differences with a higher precision than that, a signal needs to be injected whose amplitude exceeds the level of the hysteresis in order to resolve the two \Scurves{} (bottom right part of \cref{fig:hysteresis}). +The internal charge injection mechanism is well suited for this as it does not require any additional hardware. +As shown in \cref{fig:charge-amplitudes}, any of the three available charge levels by far exceed the hysteresis and are in principle suitable for the task. +However, to minimise the effect of any potential and interfering effects like timing differences between the two integrators, the smallest possible charge amplitude (CalibA) is used. + +\subsubsection{Trimming} +\label{sec:trimming} +A uniform behaviour of the PACIFIC integrators to ensure consistent performance is achieved through the trimming, which refers to the process of aligning the two integrator baselines per channel. +As discussed in \cref{sec:pacific_integration}, the trim DAC and thus the reference voltage of the integrators can take 31 different values. +On average, incrementing the trim DAC by 1 shifts the baseline by about \qty{7}{\milli\volt} (using the default operating settings). +When performing a threshold scan, these shifts of the baseline effectively move the \Scurves{} in the horizontal direction by about 2.8 threshold DACs per trim DAC. +The covered range by the trimming is illustrated in \cref{fig:trimming-illustration} for the two integrators of one PACIFIC channel. +The goal of the trimming is to align both integrator baselines such that the \Scurves{} are overlapping. +This is the prerequisite for registering the same pulse height for the same SiPM signal and thus achieve a consistent response for the even and odd integrators. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/Trimming_illustration} + \caption{ + Amplitude distributions of the three charge values available through the internal charge injection mechanism. + The mean values are indicated by the dashed lines. + } + \label{fig:trimming-illustration} +\end{figure} + +The trimming is performed as part of the test procedure during the quality assurance (QA) of the \PBs{} (see \cref{sec:qa}). +In the first step, three threshold scans are performed with the trim DACs set to the minimum, maximum and central (default) values. +As discussed previously, this happens in each case under injection of the smallest charge (CalibA) with the help of the internal charge injection mechanism. +The covered range for each channel and integrator is determined with the three initial threshold scans. +Especially the overlap between the two integrators is of interest as it defines the available range where the two integrator baselines can be aligned (see \cref{fig:trimming-illustration}). + +Within that range, a target value is defined to which the two integrators are trimmed. +To calculate the required change of the trim DAC value, the difference of the current \Scurve{} transition to the target value (in threshold DACs) is divided by 2.8, i.e. the average change in threshold DACs per trim DAC. +To achieve a good agreement of the two integrator baselines, this process is repeated multiple times. +After each iteration, another threshold scan is performed to evaluate the overlap of the \Scurves{}. +The trimming procedure is considered successful when the \Scurves{} of the two integrators are aligned within 2.5 threshold DACs for all channels of the tested \PB{}. +This is the level of accuracy that can be achieved given the resolution of the trim DACs. +In comparison to a typical photoelectron peak separation of 15 threshold DACs, this is an acceptable level of accuracy. + +\Vref{fig:trimming-comparison} shows the integrator differences of the 192 \PBs{} that are mounted on \cframe{}~2 using the trimming constants as determined during the QA procedure for the boards. +By design, the variations are within 2.5 threshold DACs when verifying the trimming within the QA stand. +However, it was found that this result is not directly applicable to the case where the identical boards are installed in ROBs and mounted on the \cframe{}. +Instead, as can be seen, the trimming distribution is smeared out and shows a significantly larger spread. + +\begin{figure} + \begin{subfigure}{0.51\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/Trimming_comparison} + \caption{Trimming distributions} + \label{fig:trimming-comparison} + \end{subfigure} + \hfill + \begin{subfigure}{0.47\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/Retrimming} + \caption{Box plot} + \label{fig:retrimming} + \end{subfigure} + \caption{ + Integrator differences of 192 \PBs{} (PBs) after the trimming as performed and measured during the PB QA and after being installed on \cframe{}~2 using the identical trimming constants (a). + As illustrated in the box plot (b), one retrimming iteration is required on the \cframe{} to achieve the same performance as before in the QA stand. + Additional trimmings only change the observed differences slightly. + The box boundaries indicate the 25th and 75th percentiles, in addition to the median (50th percentile) as the orange lines inside the boxes. + The whiskers mark the 5th and 95th percentiles. + The dashed lines indicate the region in which the trimming is considered successful. + } +\end{figure} + +In order to mitigate the effect, an attempt was made to redo the trimming of the PACIFIC integrators within the commissioning setup. +As shown in the corresponding box plot in \vref{fig:retrimming}, after one iteration of the retrimming, the same performance can be achieved as before in the QA stand. +After the second iteration, this is even slightly exceeded. +Beyond that, no further improvements can be observed. + +The tight schedule of the commissioning (see \cref{ch:commissioning}) did not allow for the retrimming to be performed for each \cframe{} during the commissioning itself. +However, as shown here, it is needed in order to restore or even exceed the intended quality. +Therefore, to ensure consistent performance between the two PACIFIC integrators, a retrimming of all channels will be necessary after the installation of the complete detector in the LHCb cavern and before starting to take data. + + +\subsection{Comparator Differences} +\label{sec:comp_differences} +Another fundamental property of the PACIFIC channels is the uniformity of the three comparators. +Although, in contrast to the integrator differences, it does not directly influence the performance, knowing the level of agreement can have an impact on the daily operation of the detector. +For instance, if a strong correlation between the three comparators is observed, only scanning the thresholds of one comparator would be required and could be applied to the remaining two (compare with \cref{sec:th_scan}). + +The measurement is carried out analogously to the assessment of the integrator differences as presented previously in \cref{sec:int_differences}. +By using the internal charge injection mechanism, it is defined by the differences in the determined charge transition positions (see illustration in \cref{fig:scurve-charge}) between the different comparators. +The results as obtained from the 50k channels on \cframe{}~2 are shown in \vref{fig:comparator-differences}. +Compared to comparator 1, which is used as reference, a similar spread of $\sigma = \qty{1.6}{DACs}$ can be observed for both remaining comparators. +In addition, systematic biases up to \qty{0.9}{DACs} between comparator 3 and 1 is visible. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/performance/Comparator_differences} + \caption{ + Differences in the determined charge transitions between the different PACIFIC comparators. + The underlying data is taken from the 50k channels on \cframe{}~2 using the internal charge injection mechanism. + The differences to the (reference) comparator 1 in each channel are displayed. + The mean values $\mu$ and standard deviations $\sigma$ of the distributions are indicated on the right. + } + \label{fig:comparator-differences} +\end{figure} + +While the slight biases are negligible compared to the overall spread, the resulting differences are at the edge of being relevant compared to a typical photoelectron peak separation of \qty{15}{DACs}. +For the majority of channels, scanning one of the three comparators and assuming a similar behaviour for the remaining two can be sufficient for some applications. +However, for optimal performance, a full threshold scan of all comparators is advisable for the calibration of the PACIFIC thresholds prior to taking physics data. + + +\section{Clock Distribution} +In view of partially small margins of errors when operating the front-end electronics using a common set of clock timing settings as presented in \cref{sec:timing_scans}, concerns about the stability of the clock phase configurations arose. +This is to be investigated by means of a series of clock timing scans: +\begin{enumerate} + \setlength\itemsep{0em} + \item Initial scans (reference) + \item Consecutive scans with identical conditions + \item After power cycling the ROBs + \item Change cooling water temperature by \qty{-5}{\celsius} ($T = \qty{15}{\celsius}$) + \item Change cooling water temperature by \qty[retain-explicit-plus]{+5}{\celsius} ($T = \qty{25}{\celsius}$) +\end{enumerate} +The clock scans were carried out on the electronics located on the bottom half of \cframe{}~2 (12 ROBs, 25k channels). +It is expected that especially the variations in the cooling water and therefore the temperature of the electronics has an effect due to slight changes in the electrical conductivity. +Note that when changing the cooling water temperature by \qty{\pm 5}{\celsius}, the average temperatures of the boards changed by about \qty{\pm 4}{\celsius}. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/Timing_scans_stability} + \caption{ + Differences in the optimal clock phases between the SYNC Pulse and PACIFIC clock for different run conditions compared to a reference (left). + Measured by the centres of the error-free intervals. + The right plot summarises the mean and standard deviation of the underlying distributions for the remaining clock phases within the SciFi front-end electronics as indicated by the markers and error bars, respectively. + } + \label{fig:timing-scans-stability} +\end{figure} + +The clock phases are scanned in the smallest available step size of \qty{48.8}{\pico\second} in order to achieve the highest possible level of accuracy. +The determined error-free clock phase interval are each compared with the initial scans that serve as a reference. +In general, differences to the reference scans are found to be in the order of the step size resolution and therefore subject to relatively large uncertainties. +However, significant differences are observed in the phase between the SYNC Pulse and PACIFIC clock for the different cooling water temperature conditions. +This is shown in \vref{fig:timing-scans-stability} (left) that displays the phase differences between the centres of the error-free intervals. +While performing a consecutive run with identical conditions as well as power cycling the ROBs only results in minor variations around 0, systematic biases can be observed between different cooling water temperatures. +On average, a shift by about \qty{80}{\pico\second} is visible between the two scans taken with the water temperature set to \qty{15}{\celsius} and \qty{25}{\celsius}, which can be explained by the length of the corresponding clock and signal lines. +As shown in \vref{fig:timing-scans-stability} (right), a similar trend can be observed for the other clock phases, although not to the same extent. + +In summary, any of the observed variations lie well below the margins of errors as found in \cref{sec:timing_scans} when operating the front-ends at a common set of clock timing settings. +As discussed, this also applies to rather unrealistic changes of the cooling water temperature. +After all, the temperature of the cooling water, as well as the ambient temperature, is more strictly controlled in the LHCb cavern as it is the case in the assembly hall on the surface. + + +\section{Dark Count Rate} +It has been discussed in \cref{sec:sipm} that the dark count rate (DCR) contributes significantly to the detector noise once the SiPM arrays are exposed to radiation. +To mitigate this, the detector is designed to allow for the cooling of the SiPMs down to \qty{-40}{\celsius} (see \cref{sec:novec}). +While the radiation dose cannot be varied within the commissioning setup consisting of new hardware, it can be used to study the influence of temperature and the applied overvoltage (\OV{}) on the DCR using the complete readout chain. + +Because of the processing of the SiPM signals inside the PACIFIC ASICs, the total DCR is reduced compared to the DCR of the SiPM arrays alone. +This is due to the integration stage that accumulates the signals within each bunch crossing of \qty{25}{\nano\second}. +Thereby, a dark count event may fall below the applied threshold if it arrives between two integration windows. +In the following, the thresholds of the PACIFIC comparators are set to be just (\qty{0.5}{pe}) above the determined pedestal positions. +For instance, with a typical photoelectron peak separation of \qty{15}{DACs} at $\OV{} = \qty{3.5}{\volt}$, this corresponds to \qty{7.5}{DACs}. +For each condition, a total of 60M events are recorded. + +\begin{figure} + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/DCR_Temperatures_ExLink} + \caption{SiPM array} + \label{fig:dcr-temperatures-link} + \end{subfigure} + \hfill + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/performance/DCR_Temperatures} + \caption{Box plot} + \label{fig:dcr-temperatures} + \end{subfigure} + \caption{ + Dark count rate (DCR) along the \num{128} channels of one SiPM array for different SiPM temperatures (a). + The box plot (b) shows the measured rates for the \num{192} SiPMs located on the bottom half of \cframe{}~2. + The box boundaries indicate the 25th and 75th percentiles, in addition to the median (50th percentile) as the orange lines inside the boxes. + The whiskers mark the 5th and 95th percentiles. + } +\end{figure} + +Due to the thermal origin of the dark counts, the DCR strongly depends on the temperature of the SiPMs. +To verify this, a series of measurements were carried out at different temperatures: \qty{-40}{\celsius}, \qty{-10}{\celsius} and \qty{20}{\celsius}. +\Vref{fig:dcr-temperatures-link} shows the determined rates along the \num{128} channels of one exemplary SiPM array. +In addition, the box plot in \vref{fig:dcr-temperatures} summaries the results from the \num{192} arrays located on the bottom half of \cframe{}~2, revealing an exponential relationship between the temperature and DCR. +Due to the fact that unirradiated SiPMs are in use at this stage, the measured rates even at room temperature are still comparatively low and are in line with the expected values of a few \unit{\kilo\hertz}. + +Analogous to this, measurements were also carried out at different overvoltages: \qty{2.5}{\volt}, \qty{3.5}{\volt} (nominal) and \qty{4.5}{\volt}. +However, due to the overall low rates no significant difference could be found between the three settings. + + + +%\subsubsection{Noise Cluster Rate} +%Due to the process of the clustering (see \cref{sec:clustering}), individual dark counts only play a subordinate role. +%In order to result in actual noise clusters, they need to occur simultaneously and in neighbouring channels. + + diff --git a/preamble.tex b/preamble.tex new file mode 100644 index 0000000..2b5c725 --- /dev/null +++ b/preamble.tex @@ -0,0 +1,139 @@ +% ---- VISUALISATION ---- + +% UTF-8 encoding +\usepackage[utf8]{inputenc} +\usepackage[T1]{fontenc} + + +% Improve visual appearance by tuning spacing between letters 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\def\reftextafter{} + \def\reftextbefore{} + \def\reftextcurrent{} +} +\makeatother + +% Captions +\usepackage[labelfont=bf, format=plain]{caption} +\usepackage{subcaption} %subfigures + +% Enhance quality of tables +\usepackage{booktabs} +\usepackage{multirow} +\usepackage{threeparttable} % Table with notes underneath +\renewcommand{\arraystretch}{1.2} % More space between rows + +% Enhance functionality of lists +\usepackage{enumitem} +\setlist[itemize,1]{label=\rule[0.3ex]{0.8ex}{0.8ex}} + +% Reset footnote counter on each page +\usepackage[perpage]{footmisc} + + +% ---- USEFUL ALIASES ---- +\newcommand{\overbar}[1]{\mkern 1.5mu\overline{\mkern-1.5mu#1\mkern-1.5mu}\mkern 1.5mu} + +% ---- NAMING CONVENTIONS ----- +\newcommand{\scifitracker}{SciFi Tracker} +\newcommand{\lhcbexperiment}{LHCb experiment} +\newcommand{\cframe}{\mbox{C-Frame}} +\newcommand{\cframes}{\mbox{C-Frames}} +\newcommand{\MB}{Master Board} +\newcommand{\MBs}{Master Boards} +\newcommand{\CB}{Cluster Board} +\newcommand{\CBs}{Cluster Boards} +\newcommand{\PB}{PACIFIC Board} +\newcommand{\PBs}{PACIFIC Boards} +\newcommand{\DCDC}{\mbox{DC-DC}} +\newcommand{\HalfROB}{\mbox{HalfROB}} +\newcommand{\HalfROBs}{\mbox{HalfROBs}} + +\newcommand{\Scurve}{\mbox{S-curve}} +\newcommand{\Scurves}{\mbox{S-curves}} + +\newcommand{\Vbd}{\ensuremath{V_\text{BD}}} +\newcommand{\Vbias}{\ensuremath{V_\text{BIAS}}} +\newcommand{\OV}{\ensuremath{\Delta V}} +\newcommand{\IIC}{\ensuremath{\text{I}^2\text{C}}} + +\newcommand{\winccoa}{\mbox{WinCC OA}} +\newcommand{\CC}{C\nolinebreak\hspace{-.05em}\raisebox{.4ex}{\tiny\textbf +}\nolinebreak\hspace{-.10em}\raisebox{.4ex}{\tiny\textbf +}} + + +% ---- SYMBOL DEFINITIONS ----- +\newcommand{\luminosity}{\mathcal{L}} + +% ---- AVOID FIGURES ON NEW PAGES ----- +\renewcommand{\topfraction}{.75} +\renewcommand{\floatpagefraction}{.75} + +% ---- ONLY WHILE EDITING ---- +\usepackage{todonotes} +%\usepackage[switch,pagewise]{lineno} +%\linenumbers +% Highlight overfull hbox with a 2cm black bar +%\overfullrule=2cm diff --git a/scifi.tex b/scifi.tex new file mode 100644 index 0000000..92a858d --- /dev/null +++ b/scifi.tex @@ -0,0 +1,836 @@ +\chapter{The Scintillating Fibre Tracker} +\label{ch:scifi} + +Up to the end of the LHC Run 2 in 2018, two different detector technologies have achieved an excellent tracking performance within the \lhcbexperiment{}~\autocite{ot-performance,ot-performance-improved,it-performance}. +The Scintillating Fibre (SciFi) Tracker is going to replace the tracking stations T1-T3 downstream of the magnet implementing a single technology based on scintillating fibres. + +The layout and working principle of the detector is outlined in this chapter, along with the motivation that led to the upgrade of the tracking stations and its requirements. +If not stated otherwise, the provided information is taken from the Technical Design Report (TDR) of the upgraded tracking system~\autocite{scifi-tdr}. + + +\section{Motivation for the Tracker Upgrade} +\label{sec:upgrade-motivation} +The Inner (IT) and Outer Tracker (OT), which have formed the downstream tracking stations of the initial \lhcbexperiment{}, were designed to provide a high precision estimation of the momentum of charged particles. +This was achieved by operating at high hit efficiency as well as high resolution in the bending plane of the magnetic field. + +The OT was a gaseous detector covering an area of approximately \qtyproduct{6 x 5}{\meter} per layer and consisted of \qty{2.4}{\meter} long straw tubes with an inner diameter of \qty{4.9}{\milli\meter}~\autocite{ot-tdr}. +The tubes were filled with a mixture or argon, carbon dioxide and oxygen allowing for fast drift times below \qty{50}{\nano\second}. +The detector modules were composed of two staggered layers of 64 straw tubes each and were arranged in three tracking stations (T1-T3). +Each station consisted of four module layers following the so-called \textit{x-u-v-x} geometry: +Modules in the \textit{x} layers were oriented vertically, while modules in the \textit{u} and \textit{v} layers were tilted by \ang[retain-explicit-plus]{+5} and \ang{-5}, respectively. +Consequently, a total of 24 straw tube layers were arranged along the direction of the beam pipe. +The average hit efficiency was estimated to be \qty{99.2}{\percent} and the position resolution was measured to be close to the design value of \qty{200}{\micro\meter}~\autocite{ot-performance}. +Utilising novel real-time calibration methods as described in Ref.~\autocite{ot-performance-improved}, the resolution could be further improved to \qty{171}{\micro\meter} during LHC Run 2. + +A plus-shaped area of approximately \qtyproduct{1.2 x 0.4}{\meter} in the centre of each layer was not covered by the OT and instead housed the IT. +The IT was a silicon microstrip detector using \qty{320}{\micro\meter} and \qty{410}{\micro\meter} thick single-sided $p^+$-on-$n$ sensors with a strip pitch of about \qty{200}{\micro\meter}~\autocite{it-tdr}. +Individual silicon sensors were \qty{7.8}{\centi\meter} in width and \qty{11}{\centi\meter} in height and were contained within a total of 12 detector boxes. +Each tracking station was composed of four boxes that were located above, below, and on both sides of the beam pipe, thus forming the aforementioned plus-shape. +Each detector box was made up of four layers following the same \textit{x-u-v-x} geometry as described above for the OT. +Despite only covering about \qty{1.3}{\percent} of the geometrical acceptance, about \qty{20}{\percent} of all charged particles that were produced close to the interaction point were passing through the active area of the IT. +The hit efficiency was estimated to be \qty{99.7}{\percent} and the resolution was measured to be \qty{58}{\micro\meter}~\autocite{it-performance}. + +The initial tracking system was designed to limit the maximum occupancy in the OT to \qty{10}{\percent} at nominal instantaneous luminosities ${\luminosity = \qty{2e32}{\per\square\centi\meter\per\second}}$. +It has been shown that it is possible to go beyond that design limit and efficiently find tracks at occupancies up to \qty{25}{\percent} in the hottest regions of the OT~\autocite{upgrade-loi}. +The necessary improvements in the track reconstruction algorithms thereby allowed data collection at instantaneous luminosities ${\luminosity = \qty{4e32}{\per\square\centi\meter\per\second}}$. +However, going beyond ${\luminosity = \qty{e33}{\per\square\centi\meter\per\second}}$ has been found to require detectors of higher granularity. +Different scenarios including an increased area of the IT along with shorter OT modules in the central part were considered. +In the end, the decision towards a scintillating fibre tracker as a cost-effective, light and uniform detector covering the area of \qty{30}{\square\meter} per layer has been made. + + +\section{Performance Requirements} +\label{sec:performance-requirements} +The main objective of the tracking detectors within the \lhcbexperiment{} is the accurate determination of the momentum of charged particles. +This information can be used to precisely measure the mass and lifetime of decayed particles. +In order to achieve that, high hit efficiencies, as well as a good position resolution are necessary. +In addition, the material budget has to be kept low to minimise multiple scattering, which is the main limiting factor for the momentum resolution of low momentum particles. +Taking these considerations into account, the following requirements for the \scifitracker{} were formulated in the TDR~\autocite{scifi-tdr}: +\begin{itemize} + \item Reaching high hit efficiencies at the level of \qty{99}{\percent}, while keeping the rate of reconstructed noise clusters low ($<\qty{10}{\percent}$ of the recorded hits) at any location. + \item The single hit position resolution must be \qty{100}{\micro\meter} or better in the bending plane of the magnet. + \item Minimise the effect of multiple scattering by keeping the material budget low. + Achieving radiation lengths ${X/X_0 < \qty{1}{\percent}}$ per detection layer is sufficient to not be the limiting factor compared to material upstream of the magnet. + \item The readout electronics needs to operate and output data at the full LHC clock speed of \qty{40}{\mega\hertz}. + Inefficiencies due to dead time should be minimised by short recovery times. + \item The aforementioned requirements should be met over the full lifetime of the upgraded LHCb detector up to an integrated luminosity of \qty{50}{\per\femto\barn}. +\end{itemize} + + +\section{Detector Design and Operating Principle} +\label{sec:scifi-design} +The \scifitracker{} fully replaces the OT and IT between the dipole magnet and RICH2 in the \lhcbexperiment{}. +It is designed to follow the identical layout as its predecessors consisting of three stations T1-T3 with four detection layers each. +The layers are arranged in the same \textit{x-u-v-x} geometry with the two inner layers being tilted by \ang[retain-explicit-plus]{+5} and \ang{-5} from the vertical axis. +Each layer covers an area of approximately \qtyproduct{6 x 5}{\meter} and consists of a minimum of 10 fibre modules. +The tracking station T3, which is furthest away from the interaction point, is equipped with two additional modules per layer to not limit the geometrical acceptance of the experiment. +\Vref{fig:T3} shows the schematic layout of the tracking station T3. + +\begin{figure} + \centering + \includegraphics[width=0.9\textwidth]{figures/scifi/T3_with_dummy} + \caption{Schematic side (left) and front (right) view of the SciFi tracking station T3 with a \qty{1.86}{\meter} tall human dummy for scale. Image adapted from Ref.~\autocite{scifi-conference-material}.} + \label{fig:T3} +\end{figure} + +Each detector module is composed of a total of eight fibre mats that are read out by multichannel arrays of silicon photomultipliers (SiPMs) located at the top and bottom of the detector. +The fibre mats itself consist of six staggered scintillating fibre layers with \qty{250}{\micro\meter} in diameter. + +The operating principle is illustrated in \vref{fig:working_principle}. +Charged particles that traverse the layers of scintillating fibres dissipate energy as ionisation and excitation. +Subsequently, the absorbed energy is transformed into luminescence emission in the scintillation medium~\autocite{scintillation-process}. +Photons that are emitted along the fibres are trapped inside by total reflections at the fibre boundaries. +They follow the course of the fibres until they reach the SiPM channels at the fibre ends. + +The amplitude of the resulting electrical signal is proportional to the number of pixels that are hit by photons within each channel. +The average light yield, i.e. the number of pixels hit, per traversing particle is in the order of 20 depending on the incident angle and distance from the SiPM array. +However, irradiating the fibres with expected doses after \qty{50}{\per\femto\barn} results in a loss of light yield by about \qty{40}{\percent}. +The position of the corresponding hit can be defined as the location of involved SiPM channels weighted by their signal amplitudes. + +\begin{figure} + \centering + \begin{minipage}[t]{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/scifi/Working_Principle} + \caption{Operating principle of the LHCb Scintillating Fibre Tracker. Image adapted from Ref.~\autocite{scifi-tdr}.} + \label{fig:working_principle} + \end{minipage} + \hfill + \begin{minipage}[t]{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/scifi/Captured_Photons} + \caption{Longitudinal (top) and cross (bottom) section of a multi-cladding scintillating fibre with exemplary trajectories of trapped photons. Image taken from Ref.~\autocite{gavardi-diss}.} + \label{fig:captured_photons} + \end{minipage} +\end{figure} + +\section{Scintillating Fibres} +\label{sec:scintillating_fibres} +The \scifitracker{} employs scintillating fibres with a round cross section of \qty{250}{\micro\meter} in diameter produced by Kuraray\footnote{Kuraray Co., Ltd., Tokyo, Japan}. +Fibres of type SCSF-78MJ were chosen for achieving a fast decay time of \qty{2.4}{\nano\second} and a large attenuation length of about \qty{3.5}{\meter}~\autocite{fibre-qa}. +A high light yield is achieved by utilising a multi-cladding structure with descending refractive indices towards the surface of the fibre, while also being mechanically more robust. +The inner cladding is made of Polymethylmethacrylate (PMMA, $n = \num{1.49}$) and surrounds the Polystyrene (PS, $n = \num{1.59}$) core, while Fluorinated polymer (FP, $n = \num{1.42}$) is used as the outer cladding. +Each cladding is about \qty{4}{\micro\meter} in thickness~\autocite{kuraray}. + +Following Snell's law about the angle dependence of light passing the boundary of two isotropic media, there exists a critical angle of incidence +\begin{equation} + \theta_\text{crit} = \arcsin{\frac{n_2}{n_1}} +\end{equation} +above which total internal reflection at the boundary occurs. +For the transition between the inner ($n_1 = 1.49$) and outer cladding ($n_2 = 1.42$) the critical angle can be calculated as $\theta_{\text{crit, PMMA}\rightarrow\text{FP}} = \ang{72.4}$. +This translates to a maximum opening angle of $2\times\ang{26.7}$ at the centre of the fibre as illustrated in \vref{fig:captured_photons}. +Assuming an isotropic photon emission, the trapping efficiency is thereby given as \qty{5.3}{\percent}. +Following similar considerations, having a single-cladding fibre with a PS core and PMMA cladding only results in a \qty{3.1}{\percent} trapping efficiency. + +Pure Polystyrene has a relatively poor quantum efficiency and long relaxation time. +Therefore, a small amount (about \qty{1}{\percent} in weight) of p-Terphenyl is added to the PS core. +This organic fluorescent dye rapidly (below \qty{1}{ns}) absorbs the excitation energy of the PS base via a non-radiative dipole-dipole interaction known as Förster Transfer~\autocite{foerster-transfer}. +Subsequently, the absorbed energy is released by the emission of a photon. +The fluorescent dye has been chosen for its high quantum efficiency $>\qty{95}{\percent}$ and fast decay times below a few ns~\autocite{scifi-tdr}. + +A secondary dye is added to the PS core in a very low concentration (below \qty{1}{\permille} in weight). +It acts as a wavelength shifter by absorbing the emission of the primary dye and re-emitting photons at a longer wavelength at which re-absorption in the fibre occurs less frequently~\autocite{scifi-reabsorption}. +Tetraphenyl butadiene (TPB) is used as the secondary dye in the scintillating fibres of type SCSF-78MJ and enables the required large attenuation length. +\Vref{fig:emission-spectrum} shows the resulting photon emission spectrum of the scintillating fibres, which peaks between \qty{450}{\nano\meter} and \qty{500}{\nano\meter} depending on the distance to the point of excitation. + +\begin{figure} + \centering + \includegraphics[width=0.8\textwidth]{figures/scifi/Scintillation_Spectrum} + \caption{ + Emission spectrum of a scintillating fibre of type SCSF-78MJ at different distances to the point of excitation. + For short distances, the maximum is located at around \qty{450}{\nano\meter} and shifts towards larger wavelengths with increasing distance due to self-absorption of the inserted wavelength shifter. + Image taken from Ref.~\autocite{janine-diss}. + } + \label{fig:emission-spectrum} +\end{figure} + +More than \qty{10000}{\kilo\meter} of fibres are used for the \scifitracker{} and were delivered to CERN in 48 individual shipments between 2016 and 2018. +Every batch of fibres was subject to a detailed test procedure~\autocite{fibre-qa}: +Samples were taken to evaluate the attenuation length before and after being exposed to X-ray irradiation in order to reveal impurities in the used materials. +The ionisation light yield was measured using energy filtered \qty{1}{MeV} electrons from a Sr-90 radioactive source. +In addition to that, for every \unit{\kilo\meter} of fibre, the quality of the cladding and uniformity of the diameter was verified. +Fibre bumps up to \qty{500}{\micro\meter} in diameter were detected and removed by a hot shrinking procedure in a fully automatic manner~\autocite{hot-shrinking}, while larger bumps were cut out manually. +The conducted quality assurance measures ensured that only high quality fibres were assembled into the fibre modules as described in the following. + + +\section{Fibre Modules} +\label{sec:fibre-modules} +The fibre modules constitute the active part of the \scifitracker{}. +In total, 128 of these modules are used and are arranged in 12 layers and 3 stations as described in \cref{sec:scifi-design}. +Each fibre module is \qty{4.85}{\meter} long and \qty{0.52}{\meter} in width. +\Cref{fig:exploded-fibre-module} shows an exploded view of one fibre module with its key constituents. +The core of one module consists of eight fibre mats that are arranged in two rows with four mats lying side by side in each row. + +\begin{figure} + \centering + \includegraphics[width=0.8\textwidth]{figures/scifi/Fibre_Module} + \caption{ + Exploded view of one fibre module of the \scifitracker{}. + Image adapted from Ref.~\autocite{fibre-modules-design-review}. + } + \label{fig:exploded-fibre-module} +\end{figure} + +The width of each fibre mat is about \qty{0.13}{\meter} and was chosen as a compromise between covering a large area and still being easy to handle. +Following similar considerations, the length was chosen such that two mats are required to cover the full module length of \qty{4.85}{\meter}. +Even though this design introduces a small gap of about \qty{2}{\milli\meter} at the centre of the module between the two rows of fibre mats, it bears the additional advantage that the light yield of a single particle crossing is concentrated into fewer SiPM channels on only one side of the module. +Photons that are emitted towards the centre of the module are reflected back to the outside by a mirror foil that is glued to the fibre mat end. + +The fibre mats are sandwiched between two half-panels that are made of a carbon fibre, honeycomb structure. +The half-panels provide the necessary mechanical stiffness to the modules while keeping the material budget low. + + + +\subsubsection{Fibre Mats} +The main components of the modules are the fibre mats. +Each fibre mat consists of six layers of scintillating fibres as described in \cref{sec:scintillating_fibres} and measures about \qty{2.4}{\meter} in length and \qty{0.13}{\meter} in width. +\Vref{fig:fibre-mat-crosssection} shows the cross section of one fibre mat. + +\begin{figure} + \centering + \includegraphics[width=0.6\textwidth]{figures/scifi/Fibre_Mat_Crosssection} + \caption{ + Cross section of one fibre mat used in the \scifitracker{}. + Image taken from Ref.~\autocite{janine-diss}. + } + \label{fig:fibre-mat-crosssection} +\end{figure} + +A fibre pitch of \qty{275}{\micro\meter} is chosen to be \qty{10}{\percent} larger than the nominal fibre diameter to allow for small production tolerances. +Proper fibre positioning is achieved by winding the fibre mats on a threaded wheel with a diameter of about \qty{0.82}{\meter}~\autocite{fibre-modules-design-review}. +While the scintillating fibres in the first layer are guided by the grooves in the winding wheel, fibres in subsequent layers fall into the gaps of the underlying layer. +This results in the staggered arrangement of the layers as can be seen in \vref{fig:fibre-mat-crosssection}. + +Epoxy glue loaded with $\mathrm{TiO_2}$ is added during the winding process to bond the fibres together, while also providing a thin protection coating on the surface. +Additionally, the glue gets filled into \qty{2}{mm} deep holes that are located in the winding wheel with a distance of about \qty{245}{mm} to each other around the circumference of the wheel. +After curing, the glue sticks to the fibre mat resulting in small pins that are used to align the mats with a precision of better than \qty{100}{\micro\meter} in the $x$-direction during the module production~\autocite{scifi-tdr}. +A close-up view of one alignment pin is shown in \vref{fig:alignment-pin}. +The machine used for the serial production of the fibre mats is shown in \vref{fig:winding-machine}. + +\begin{figure} + \centering + \begin{minipage}{0.58\textwidth} + \centering + \includegraphics[width=1\textwidth]{figures/scifi/Winding_machine} + \caption{ + Winding machine for the serial production of the fibre mats for the \scifitracker{}. + The path of the wound fibre is highlighted in blue. + Image taken from Ref.~\autocite{fibre-modules-design-review}. + } + \label{fig:winding-machine} + \end{minipage} + \hfill + \begin{minipage}{0.38\textwidth} + \centering + \captionsetup[subfigure]{justification=centering} + \begin{subfigure}{1\textwidth} + \includegraphics[clip, trim=2cm 0cm 1cm 0cm, width=\linewidth]{figures/scifi/Fibre_Mat_Winding_OK.pdf} + \caption{Nominal winding pattern.} + \label{fig:winding-ok} + \vspace{0.2cm}% + \end{subfigure} + \begin{subfigure}{1\textwidth} + \includegraphics[clip, trim=2cm 0cm 1cm 0cm, width=\linewidth]{figures/scifi/Fibre_Mat_Winding_Err1.pdf} + \caption{Scintillating fibre skipped one groove.} + \label{fig:winding-err1} + \vspace{0.2cm}% + \end{subfigure} + \begin{subfigure}{1\textwidth} + \includegraphics[clip, trim=2cm 0cm 1cm 0cm, width=\linewidth]{figures/scifi/Fibre_Mat_Winding_Err2.pdf} + \caption{Scintillating fibre jumped to a higher layer.} + \label{fig:winding-err2} + \end{subfigure} + + \caption{ + Nominal pattern (a) and different types of errors (b,c) that can occur during the winding of a fibre mat. + Images adapted from Ref.~\autocite{fibre-modules-design-review}. + } + \label{fig:winding-errors} + \end{minipage} +\end{figure} + +A reliable winding of the fibre is enabled by applying a constant tension using a dancer roller system. +However, different types of errors can occur during the winding of the fibre mats and are illustrated in \vref{fig:winding-errors}. +The winding procedure is monitored with a monochromatic industrial camera that feeds its output to a Convolutional Neural Network (CNN)~\autocite{cnn}. +This approach allows for a semi-automatic winding procedure where manual intervention is only needed in case of detected defects~\autocite{janine-diss}. + +%Due to wobbling motions of the winding wheel, the wound fibre can jump to an advanced position (see \vref{fig:winding-err1}), or to a preceding groove causing it to be stacked onto the current layer (see \vref{fig:winding-err2}). +%In either case, the winding is stopped and the defect corrected by manually turning back the wheel. +%The detection of winding errors is achieved by monitoring the currently wound fibre tangentially to the wheel with a monochromatic industrial camera. +%The camera output is fed to a Convolutional Neural Network (CNN)~\autocite{cnn} in order to classify each image for winding defects. +%The trained CNN reached an accuracy, i.e. correct classification of an image, of \qty{99.99}{\percent}~\autocite{janine-diss}. +%This approach allows for a semi-automatic winding procedure where manual intervention is only needed in case of detected defects. + +%After the actual winding is performed, which is a process that takes about \qty{2.5}{\hour}, a \qty{25}{\micro\meter} Kapton foil is applied to the accessible side of the fibre mat. +After the actual winding is performed, a \qty{25}{\micro\meter} Kapton foil is applied to the accessible side of the fibre mat. +The foil acts as an additional protection layer while also shielding the scintillating fibres from external light sources. +%After curing of the used epoxy glue for about \qty{36}{\hour}, the fibre mat is cut at a predefined location on the winding wheel perpendicular to the fibre direction and taken off the wheel. +Afterwards, the fibre mat is cut at a predefined location on the winding wheel perpendicular to the fibre direction and taken off the wheel. +In the process, the fibre mat immediately shrinks in the order of \qty{1}{\centi\meter} due to the constant tension applied during the winding. +The removed mat is heated up to \qty{40}{\celsius} to flatten it. +Afterwards, the Kapton foil is applied from the remaining side, leaving out small cutouts for the alignment pins. + +At this stage, the fibre mat is still slightly larger than the final dimensions. +The nominal length of \qty{2424}{\milli\meter}~\autocite{fibre-modules-design-review} is defined by so-called end pieces made from plastic that are glued to both sides on both ends of the fibre mat. +The excess parts of the mat are pre-cut using a saw blade and further processed using a diamond milling head. +On one side of the mat, the SiPM arrays will be pressed against the smooth surface that is obtained in this way. +On the other side, a mirror foil is applied to reflect back photons that are emitted away from the SiPMs in order to increase the overall light yield. +An aluminized Mylar foil is used for that purpose which proved to reach a reflectivity in the order of \qty{80}{\percent}~\autocite{fibre-mirrors}. + +All the steps listed previously were performed in four different locations: TU Dortmund, RWTH Aachen, EPFL in Lausanne and Kurchatov Institute in Moscow. +A total of 1024 fibre mats that are needed for the complete detector plus spares were produced in these winding centres. +A finished fibre mat is shown in \vref{fig:finished-mat} and is already cut to its nominal length. +However, when leaving the winding centres, the width is still slightly larger than their nominal value and they feature excess Kapton foil to both edges. +This allows for a safe transport to the module assembly centres, where the mats are embedded into the mechanical support structure of the fibre modules. + +\begin{figure} + \centering + \begin{minipage}[t]{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/scifi/Alignment_Pin} + \caption{Close-up view on a wound fibre mat with alignment pin. Image taken from Ref.~\autocite{janine-diss}.} + \label{fig:alignment-pin} + \end{minipage} + \hfill + \begin{minipage}[t]{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/scifi/Fibre_Mat_finished.pdf} + \caption{Finished and laminated fibre mat with plastic end piece. Image taken from Ref.~\autocite{janine-diss}.} + \label{fig:finished-mat} + \end{minipage} +\end{figure} + + +\subsubsection{Mechanical Support Structure} +The wound fibre mats that are produced in the winding centres are shipped to two different locations in order to get assembled to full-size detector modules. +In these so-called module assembly centres, which are at Heidelberg University and Nikhef in Amsterdam, the fibre mats are embedded into a support structure that provides mechanical stiffness and protection to the modules. +Before that can happen, the excess Kapton foil needs to be removed and the fibre mats need to be cut to their nominal width of \qty{130.65}{\milli\meter}. +%This is done with the help of two parallel circular saws. +%They perform the cuts with a precision of better than \qty{150}{\micro\meter} to ensure a minimal loss of acceptance between two neighbouring fibre mats~\autocite{fibre-modules-design-review}. + +Afterwards, eight fibre mats are laid out in the final \numproduct{2 x 4} arrangement as shown in~\vref{fig:exploded-fibre-module} onto a high precision template made from a single aluminium plate. +The alignment pins of the mats are facing down and are guided by four longitudinal grooves in the template. +The grooves have a centre-to-centre distance of \qty{130.8}{\milli\meter} leaving a gap of \qtyrange[range-phrase=--,range-units=single]{0.15}{0.20}{\milli\meter} in-between two neighbouring fibre mats to account for tolerances of the longitudinal cut. +The positioning follows the geometry of the SiPM arrays (see \cref{sec:sipm}) such that no additional loss of acceptance is introduced by the gaps. + +In the next step, glue is applied on the surface of the fibre mats that bonds the mats to the \qty{2}{\centi\meter} thick support structure made from a light core material (Nomex honeycomb). +At the ends of the modules, the honeycomb is cut out to provide space for four individual pieces of aluminium, the so-called end plugs. +The end plugs act as an anchor point to mount and align the fibre modules in the detector. +Additionally, they house the light injection system (see \cref{sec:lis}) that is used for calibrating the individual channels. +The outer shell of a fibre module consists of a carbon fibre reinforced polymer (CFRP) skin that is \qty{200}{\micro\meter} thick and provides the necessary stiffness to the module. +%The CFRP skin is attached to the end plugs and honeycomb using another layer of glue. +%Pressure is applied using a vacuum pump and foil while the glue cures for eight hours. + +The partially assembled module is turned over to the other side and placed onto another, flat aluminium template. +In this position, the placement and straightness of the fibre mats within the module is verified using a test setup consisting of a laser and a beam camera: +The laser is positioned on one side of the module pointing along the centre of two facing fibre mats. +The beam camera is successively positioned on top of the total of 16 alignment pins on the two mats and the position of the beam projection is recorded. +The camera is mounted on an aluminium block with the same kind of groove as in the aluminium template to allow for an accurate placement on top of the alignment pins. +Like this, the straightness of the fibre mats in the module can be evaluated by the deviation of the recorded beam projections to a straight line in both the horizontal and vertical direction with respect to the setup on the assembly table, corresponding to the $x$ and $z$ direction within the LHCb coordinate system. +\Vref{fig:laser-test} shows the exemplary result of two facing fibre mats demonstrating a straightness of better than the required \qty{100}{\micro\meter} along all pins. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/scifi/FSM00073_LaserTest} + \caption{ + Evaluation of the straightness of two facing fibre mats within a fibre module using a test setup consisting of a laser and a beam camera. + The deviations from a straight line along the alignment pins are shown in both the $x$ (top) and $z$ (bottom plot) direction within the LHCb coordinate system. + } + \label{fig:laser-test} +\end{figure} + +After the straightness of the fibre mats is verified, the module is closed from the remaining side using another half-panel consisting of honeycomb core material and a CFRP skin. +In order to provide light-tightness to the module, it is finished by closing the sides with CFRP sidewalls. +\Vref{fig:module-side-view} shows the schematic side view and cross section of a finished fibre module. +At this stage, the scintillating fibres are only exposed to the outside between the plastic end pieces of the fibre mats on both sides of the module. +They will later be covered by the SiPM arrays (see \cref{sec:sipm}). + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/scifi/Fibre_Module_Sideview} + \caption{ + Cross section and side view of a fibre module of the \scifitracker{}. + The dimensions shown in this image are given in \unit{mm}. + Image taken from Ref.~\autocite{fibre-modules-design-review}. + } + \label{fig:module-side-view} +\end{figure} + +Special modules need to be produced to account for the beam pipe as indicated in \vref{fig:T3}. +They feature a rectangular \qtyproduct{13 x 11.5}{\centi\meter} cutout on one side of the module. +To allow for this, the two fibre mats on this side of the module are produced with a reduced length. +The originally intended circular cutout was found to be difficult to realise due to the mirror foil that needs to be applied to the fibre mat ends~\autocite{revised-geometry}. + +The material budget of the individual components of a \scifitracker{} module are listed in \vref{tab:module-material-budget}. +The aluminium end plugs are not considered because they lie outside the acceptance of the experiment. +The total radiation length for one module is $\qty{0.984}{\percent} X_0$ which translates to $\qty{3.936}{\percent} X_0$ for one tracking station consisting of four detection layers. +This value fulfills the required limit on the material budget as listed in \cref{sec:performance-requirements}. +While the Nomex honeycomb structure accounts for \qty{95}{\percent} of the module's thickness, it only contributes about \qty{31}{\percent} to the total radiation length. +Note that the total thickness given in \vref{tab:module-material-budget} is slightly larger than the nominal value of \qty{41.6}{\milli\meter} due to submersion of the glue into the honeycomb~\autocite{fibre-modules-design-review}. + +In total, 128 fibre modules needed for the detector plus spares were produced at the two module assembly centres between 2016 and 2019. +Of these, about \qty{20}{\percent} are special modules with a rectangular cutout on one side to account for the beam pipe in the centre of each of the 12 detection layers. + +\begin{table} + \centering + \caption{ + Material budget for a scintillating fibre module. + Data taken from~\autocite{fibre-modules-design-review,pdg}. + } + \label{tab:module-material-budget} + \begin{tabular}{@{}lrrr@{}} \toprule + Material & Thickness $\Delta z$ [\unit{\micro\meter}] & Radiation length $X_0$ [\unit{\centi\meter}] & $\Delta z / X_0$ [\unit{\percent}] \\ \midrule + Scintillating fibres & \num{1350} & \num{33.2} & \num{0.407} \\ + Kapton foil & \numproduct{2 x 25} & \num{28.6} & \num{0.017} \\ + Panel assembly glue & \numproduct{4 x 75} & \num{36.1} & \num{0.083} \\ + Nomex honeycomb & \numproduct{2 x 20000} & \num{1310.0} & \num{0.305} \\ + Carbon fibre skin & \numproduct{2 x 200} & \num{23.3} & \num{0.172} \\ \addlinespace + \textbf{Total} & \num{42100} & & \num{0.984} \\ \bottomrule + \end{tabular} +\end{table} + + +\section{Silicon Photomultipliers} +\label{sec:sipm} +Silicon photomultipliers (SiPMs) are solid state devices that allow for the detection of individual photons. +Combined with their small dimensions and high granularity they meet the needs for a high resolution tracker like the SciFi~\autocite{scifi-tdr}. + +\subsubsection{Operating Principle} +The functionality of solid state photon detectors is based on a $p$-$n$ junction, which refers to the boundary between $n$- and $p$-doped regions inside a semiconductor material. +Close to the boundary, electrons from the $n$-doped region diffuse into the $p$-doped region and, vice versa, electron holes from the $p$-doped region diffuse into the $n$-doped region. +By recombination of electrons and holes in the area around the boundary, the so-called depletion zone, the amount of free charge carriers is reduced significantly resulting in a low electrical conductivity. +The diffusion continues until the electrical potential that is generated in the process counteracts the motion of the charge carriers. + +\paragraph{Forward Bias} +By applying a positive external voltage to the $p$-side with respect to the $n$-side (forward bias) the diffusion process is reversed. +When the bias voltage is large enough, the depletion zone becomes very thin and the $p$-$n$ junction becomes conductive allowing for a (forward) current flow. + +\paragraph{Reverse Bias} +Applying a negative external voltage to the $p$-side with respect to the $n$-side (reverse bias) has the opposite effect: +The depletion zone expands and the electrical conductivity stays low. +Only a small (reverse) current can flow. \\ + +\noindent +A photodiode makes use of operating a $p$-$n$ junction with a reverse bias voltage applied. +Photons with sufficient energy can create electron-hole pairs in the depletion zone via the photoelectric effect. +A free electron that is generated by this process is called (primary) photoelectron (pe). +Since the resulting current flow only consists of individual charge carriers, photodiodes are not suitable for low intensity applications like the \scifitracker{}. + +Avalanche photodiodes (APD) overcome this issue by operating at higher voltages. +The thereby increased electrical field at the $p$-$n$ junction accelerates the primary photoelectrons up to energies at which they can create electron-hole pairs themselves. +This process can repeat itself several times causing an avalanche of charge carriers that is measurable as an electrical current. + +When the applied voltage is increased even further, beyond the breakdown voltage \Vbd{}, a single primary photoelectron can cause a self sustaining avalanche (Geiger mode). +The released charge is independent of the number of primary photoelectrons and results in a permanent current if unquenched. +In practice, the avalanche is typically interrupted by inserting a resistor in series to the photodiode. +As the current flow increases during the emerging avalanche, the applied voltage is lowered below the breakdown voltage by the so-called quench resistor $R_\text{Q}$ such that no more charge carriers can be created. + +SiPMs are composed of an array of APD pixels that are operated in Geiger mode (G-APD). +They are connected in parallel such that the resulting signal is proportional to the number of pixels with a triggered avalanche. +If the probability for multiple photons hitting the same pixel is low, SiPMs allow for the counting of individual photons. +This is given when the number of pixels is much greater than the number of incident photons. +The amplitude of a signal is typically stated in units of generated primary photoelectrons ($X\,\text{pe}$), which is equivalent to the number of involved pixels in low light conditions. + +\subsubsection{Correlated and uncorrelated Noise} +SiPMs are subject to different types of noise that affect the operation. +One distinguishes between correlated and uncorrelated noise. + +\paragraph{Correlated Noise} +The emergence of correlated noise is, as the name suggests, correlated to the occurrence of an initial signal. +A large contribution comes from crosstalk. +Crosstalk originates from infrared photons that are emitted in a pixel during an avalanche. +These photons can reach neighbouring pixels causing another discharge. +Depending on the region where the photon is absorbed, the resulting pulse either happens instantaneously (\textbf{direct crosstalk}, within a few \qty{100}{\pico\second}) or with a significant delay up to \qty{100}{\nano\second} (\textbf{delayed crosstalk}) with respect to the initial signal~\autocite{sipm-for-scifi}. + +Delayed crosstalk must not be confused with \textbf{afterpulses}, which have a different formation mechanism. +Afterpulses occur due to defects in the silicon lattice that can act as charge traps. +A charge carrier created during an avalanche can get caught in these traps. +When it is released at a later time, it can trigger another discharge in the same pixel causing a second, delayed pulse distributed over a few \qty{100}{\nano\second}~\autocite{sipm-for-scifi}. + +\paragraph{Uncorrelated Noise} +Instead of being excited by an incident photon, an electron-hole pair in the depletion zone can also be generated by thermal excitation. +The resulting signal is indistinguishable from a photon induced avalanche. +This type of noise can occur randomly and is independent of any initial signal. +Because of that, it is also referred to as \textbf{dark counts}. +Due to the thermal origin, the dark count rate (DCR) strongly depends on temperature. +In addition to that, the DCR increases after irradiation. \\ + +\noindent +Various combinations of the different types of noise can occur. +For example, it is not uncommon that a dark count arises in conjunction with a crosstalk event. +The amplitude of the resulting signal is thereby increased making it more difficult to be identified as noise. + + + + + +\subsubsection{Basic electrical Model} +Following Ref.~\autocite{sipm-technical-guide}, a basic electrical model of a G-APD can be developed to derive the key characteristics of the signal pulse. +It consists of the breakdown voltage \Vbd{}, capacity $C_\text{J}$ and ohmic resistance $R_\text{S}$ of the G-APD, as well as the quench resistor $R_\text{Q}$ and bias voltage \Vbias{}. +A conceptual switch $S$ is responsible for initiating ($S$ is closed) and terminating ($S$ is open) the avalanche. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/scifi/SiPM_Model} + \caption{ + Electrical circuit of a basic equivalent model for an externally biased G-APD (left). + The plot on the right shows the signal pulse after closing (at $t_0$) and re-opening (at $t_\text{max}$) the switch $S$. + Image inspired from Ref.~\autocite{sipm-technical-guide}. + } + \label{fig:sipm-model} +\end{figure} + +\Vref{fig:sipm-model} (left) shows the electrical circuit of the model. +In the absence of incident photons and ignoring dark noise, the switch $S$ is open. +The capacitor $C_\text{J}$ is fully charged by the applied bias voltage \Vbias{}. +No current is flowing. +Then, representative for an incident photon triggering an avalanche, the switch $S$ is closed at time $t_0$. +The capacitor $C_\text{J}$ begins discharging through the series resistor $R_\text{S}$ as a flowing current +\begin{equation} + I_\text{S}(t) \sim 1 - \text{exp}\left(-\frac{t}{R_\text{S}C_\text{J}}\right) \equiv 1 - \text{exp}\left(-\frac{t}{\tau_\text{S}}\right) +\end{equation} +with a time constant $\tau_\text{S}$\,. +At $t_\text{max}$, which is in the order of \qty{1}{ns} after $t_0$~\autocite{sipm-technical-guide}, the maximum current +\begin{equation} + I_\text{max} = \frac{V_\text{BIAS}-V_\text{BD}}{R_\text{Q}+R_\text{S}} \equiv \frac{\OV}{R_\text{Q}+R_\text{S}} +\end{equation} +is reached. +The introduced variable \OV{} is called overvoltage. +At this time, the applied voltage to the G-APD drops down to approximately \Vbd{}, which is not sufficient to sustain the avalanche. +The switch $S$ opens and the capacitor $C_\text{J}$ is recharged by a current +\begin{equation} + I_\text{Q}(t) \sim \text{exp}\left(-\frac{t}{R_\text{Q} C_\text{J}}\right) \equiv \text{exp}\left(-\frac{t}{\tau_\text{Q}}\right) +\end{equation} +with a time constant $\tau_\text{Q}$\,, which is also referred to as the recovery time. +The shape of the resulting signal is shown in \vref{fig:sipm-model} (right). +For $R_\text{Q} \gg R_\text{S}$ and thereby $\tau_\text{Q} \gg \tau_\text{S}$, the total charge $Q$, i.e. area under the signal shape, can be derived as +\begin{equation} + Q = I_\text{max} \cdot \tau_\text{Q} = \frac{\OV}{R_\text{Q}+R_\text{S}} \cdot R_\text{Q} C_\text{J} = \OV \cdot C_\text{J}\,. +\end{equation} +Since the avalanche is triggered by a single primary electron with elementary charge $e$, the charge amplification factor -- or gain $G$ -- is given by +\begin{equation} + \label{eq:sipm-gain} + G = \frac{Q}{e} = \frac{\OV \cdot C_\text{J}}{e}\,. +\end{equation} +Typical operation values for the gain of SiPMs lie between $10^5$ and $10^7$~\autocite{sipm-technical-guide}. + + + + + + +\subsubsection{Application at the \scifitracker{}} + +\begin{figure} + \centering + \includegraphics[width=0.8\textwidth]{figures/scifi/SiPM_with_zoom} + \caption{ + Hamamatsu H2017 128-channel SiPM array with flex cable and connector as used for the \scifitracker{} (left). + A zoomed in view on the active area with the gap between the two dies is shown on the right, as well as an illustration of the position of one SiPM channel with respect to the fibre mat. + Image adapted from Ref.~\autocite{axel-diss}. + } + \label{fig:sipm-zoom} +\end{figure} + +The \scifitracker{} utilises a total of \num{524288} SiPM channels that are grouped in 128-channel arrays. +The multichannel arrays referred to as H2017 are custom-made and produced by Hamamatsu\footnote{Hamamatsu Photonics K.K., 325-6, Sunayama-cho, Naka-ku, Hamamatsu City, Shizuoka Pref., 430-8587, Japan}. +One array is \qty{32.54}{\milli\meter} wide and consists of two dies with 64 channels each. +The silicon dies are protected with a thin \qty{105}{\micro\meter} epoxy layer~\autocite{axel-diss}. +After mounting in the detector, the insensitive area between two adjacent SiPM arrays amounts to \qty{480}{\micro\meter}, while the specifications state the gap between the two dies to be \qty{220 \pm 50}{\micro\meter}~\autocite{sipm-specifications}. +The geometry was chosen such that the width of multiple arrays match the fibre mat and module dimensions. +One mat is instrumented with four SiPM arrays, which translates to 16 arrays for a fibre module on each end. +\Vref{fig:sipm-zoom} shows a photo of a H2017 package with a zoomed in view on the individual SiPM channels. +The package is mounted on a Kapton flex PCB (Printed Circuit Board) that is about \qty{12}{\centi\meter} long. +Two 80-pins, \qty{0.5}{\milli\meter} pitch connectors\footnote{DF12(3.0)-80DP-0.5V by Hirose Electric Co., Ltd.} are placed on the other end of the flex PCB to provide the SiPM connections to the front-end electronics (see \cref{sec:fee}). + +\begin{figure} + \centering + \begin{minipage}[t]{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/scifi/SiPM_PDE} + \caption{ + Measured photon detection efficiencies (PDE) based on a pulse counting approach for an H2017 SiPM array for different wavelengths $\lambda$ and overvoltages $\Delta V$. + Image taken from Ref.~\autocite{sipm-for-scifi}. + } + \label{fig:sipm-pde} + \end{minipage} + \hfill + \begin{minipage}[t]{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/scifi/SiPM_Noise} + \caption{ + Probabilities for different types of correlated noise as determined during the quality assurance of \num{5000} H2017 SiPMs. + Variations in the order of $\pm \qty{1}{\percent}$ were observed between the different devices. + Image taken from Ref.~\autocite{olivier-diss}. + } + \label{fig:sipm-noise} + \end{minipage} +\end{figure} + +The SiPM channel pitch is \qty{250}{\micro\meter} thus matching the diameter of the scintillating fibres. +The height is with \qty{1625}{\micro\meter} about \qty{20}{\percent} larger than the fibre mat to allow for slight misalignments during the assembly. +One channel is composed of \numproduct{4 x 26} pixels each covering an area of \qtyproduct{57.5 x 62.5}{\micro\meter}. +As shown in \vref{fig:sipm-pde}, the large pixel size allows for high photon detection efficiencies up to \qty{44}{\percent} at the nominal overvoltage $\Delta V = \qty{3.5}{\volt}$~\autocite{sipm-for-scifi} for the relevant wavelengths from \qtyrange{400}{600}{\nano\meter} (compare with \vref{fig:emission-spectrum}). +Additionally, it enables the application of isolating trenches to suppress crosstalk. +\Vref{fig:sipm-noise} shows the crosstalk probability for different overvoltages $\Delta V$, as well as the probabilities for other types of correlated noise. +At the nominal overvoltage $\OV = \qty{3.5}{\volt}$, the total probability for correlated noise amounts to about \qty{7}{\percent}. +It is split equally between the two types of crosstalk: direct and delayed. +Afterpulses practically do not play a role for H2017 arrays. + +The typical gain for an H2017 SiPM array is $G = \num{4e6}$ at the nominal overvoltage. +\Vref{fig:sipm-gain} shows the dependence of the gain on the overvoltage for one channel. +As derived in \vref{eq:sipm-gain}, it follows a linear relation. +The recovery time is found to be $\tau_\text{Q} = \qty{84.6\pm0.2}{\nano\second}$. +The breakdown voltage \Vbd{} ranges from \qtyrange{51.0}{52.5}{\volt} as determined among 20 devices from the production batch. +Within one array, it typically varies by $\qty{\pm300}{\milli\volt}$~\autocite{axel-diss}. +When operated at the same voltage around the nominal overvoltage $\OV = \qty{3.5}{\volt}$, this results in a gain uniformity of better than \qty{10}{\percent} as required in the TDR~\autocite{scifi-tdr}. + + +\begin{figure} + \centering + \begin{minipage}[t]{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/scifi/SiPM_Gain} + \caption{ + Dependence of the gain on the overvoltage for one H2017 SiPM channel. + The red line shows the result of a linear fit to the data. + Image taken from Ref.~\autocite{sipm-for-scifi}. + } + \label{fig:sipm-gain} + \end{minipage} + \hfill + \begin{minipage}[t]{0.48\textwidth} + \centering + \includegraphics[width=1.0\linewidth]{figures/scifi/SiPM_DCR} + \caption{ + Dark count rate (DCR) as a function of the temperature for irradiated H2017 SiPMs at $\OV = \qty{3.5}{\volt}$. + The coefficient $T_{1/2}$ that describes the temperature difference at which the DCR is reduced by $1/2$ is determined with an exponential fit in the range [$-40,-10$]$\,\unit{\celsius}$ and indicated by the solid lines. + Image adapted from Ref.~\autocite{olivier-diss}. + } + \label{fig:sipm-dcr} + \end{minipage} +\end{figure} + +A key parameter for the operation of the \scifitracker{} is the rate at which dark counts occur (DCR), as it is main source of noise for the detector. +As described previously, the DCR strongly depends on both temperature and irradiation dose, specifically the \qty{1}{MeV} neutron-equivalent fluence (\unit{n_{eq}\per\centi\square\meter}). +Towards the end of the lifetime of the upgraded detector, the expected fluence that the SiPMs will have received is \qty{6e11}{n_{eq}\per\centi\square\meter}~\autocite{scifi-tdr}. +At that time, the DCR will reach values of several hundred \unit{MHz} at room temperature, while the DCR of an unirradiated SiPM is in the order of \unit{kHz}. +This drastic increase resulting from lattice deformations is mitigated by cooling of the SiPM arrays. +As shown in \vref{fig:sipm-dcr}, the DCR can be reduced by \qty{50}{\percent} with every decrease in temperature by about \qty{10}{\celsius}. +Thereby, at the end of LHC Run 4, manageable DCRs in the order of \qty{10}{MHz} can be reached at \qty{-40}{\celsius}. +Reaching low DCRs of irradiated SiPMs at \qty{-40}{\celsius} was a main criteria for the selection of the best suited technology during the R\&D phase of the \scifitracker{}. + +The temperature of each array can be monitored with the help of a Pt1000 temperature sensor\footnote{Pt1000 SMD 0603 Class B by Heraeus Nexensos GmbH} that is mounted on the backside of the SiPM array. +The specific sensor was chosen to cover the temperature range of interest between \qtyrange[retain-explicit-plus,range-phrase={ and }]{-40}{+30}{\celsius} with a precision of \qty{\pm1}{\celsius}~\autocite{axel-diss}. + + +\section{Front-End Electronics} +\label{sec:fee} + +The front-end electronics of the \scifitracker{} are located just outside of the geometrical acceptance on both ends of the fibre modules. +They provide the interface between the SiPMs and the control and data-acquisition (DAQ) system. +The connection to the SiPMs is established via flex cables as shown in \vref{fig:sipm-zoom}, while the communication with the back-end electronics happens over optical fibres. +The optical connections are divided into unidirectional links for the transmission of the data, and bidirectional control links. + +\begin{figure} + \centering + \includegraphics[width=1.0\textwidth]{figures/scifi/ROB_Photo} + \caption{ + Photograph of a SciFi Readout Box (ROB) with the top cover removed. + The connection to the SiPM arrays is made via 16 connectors located at the bottom. + } + \label{fig:rob-photo} +\end{figure} + +The front-end electronics are grouped into so-called Readout Boxes (ROBs), which are the physical units that are mounted to the fibre modules. +In total, the front-end electronics of the \scifitracker{} consists of 256 ROBs with more than half a million channels. +A photograph of one ROB with the top cover removed is shown in \vref{fig:rob-photo}. +It consists of two identical halves, which are referred to as HalfROBs. +Besides from sharing a common housing and cooling block, the HalfROBs are fully independent from each other in terms of power and control. + +The front-end electronics follow a modular design. +Each HalfROB consists of one Master Board, four Cluster Boards, and four PACIFIC Boards. +The latter are the direct interfaces to the SiPMs. +Each PACIFIC Board houses four custom 64-channel ASICs (Application Specific Integrated Circuits) that perform the analogue processing and digitisation of the SiPM signals. +In the next step, the Cluster Boards perform a hit reconstruction and noise suppression on the digital pattern provided by the PACIFIC Boards with the help of two on-board FPGAs (Field Programmable Gate Arrays). +Lastly, the clustered data is encoded and shipped to the DAQ servers via optical transmitters located on the Master Board. +In addition, the Master Board is responsible for distributing power, clocks and control commands among all boards within one HalfROB. + +A detailed description of the various components of the SciFi front-end electronics is given in \cref{ch:fee}. + + +\section{Infrastructure} +The operation of the \scifitracker{} is only enabled with the help of a reliable infrastructure. +It includes the provision with electrical power and cooling for the various components. +In addition, a mechanical support structure is required that holds the detector modules in place and routes the supply lines to the desired locations. +The different parts constituting the infrastructure are described in the following. + + +\subsection{Electrical Power} +Two different types of power supplies are used for the \scifitracker{}. +They can be distinguished by the voltage levels at which they are operated. + +\subsubsection{Low Voltage} +\label{sec:lv} +The front-end electronics are powered by MARATON power supplies manufactured by W-IE-NE-R\footnote{W-IE-NE-R Power Electronics GmbH, Burscheid, Germany}. +These devices are specifically developed for the operation at the LHC in a magnetic and radiation environment. +This is also reflected by the acronym MARATON that stands for \textbf{\underline{Ma}}gnetism \textbf{\underline{Ra}}diation \textbf{\underline{To}}lerant \textbf{\underline{N}}ew power supply system. +Each unit offers 12 independent low voltage/high current channels that provide up to \qty{300}{\watt} each~\autocite{maraton}. + +The MARATON system consists of three main components: the power box, a primary rectifier, and a remote controller. +The primary rectifier converts the \qty{230}{\volt} AC (alternating current) mains voltage to a regulated \qty{385}{\volt} DC (direct current) voltage that is fed to the power box. +In the MARATON power box, DC-DC converters are used to provide up to 12 low voltage floating output voltages. +With the help of the remote controller, each channel can be switched off or on independently. +In addition, it allows for the monitoring of the output voltages and currents. +The adjustment of the output voltage for each channel is possible via a potentiometer that is accessible with a screwdriver at the front of the power box and that can be set up to \qty{8}{\volt}. +In the same way, the overvoltage protection (OVP) and current limits can be modified. + +At the \scifitracker{}, each MARATON channel delivers power for up to two ROBs. +To limit the voltage drop in the cables due to high currents, the power box is located near the detector in a harsh environment with high radiation and stray magnetic fields. +The connection to the primary rectifier is established with an Amphenol ECTA 133 circular connector, while two 37-pin D-SUB connectors are used for the communication with the remote controller. +The system is designed such that the primary rectifier and remote controller are operated in a safe environment under standard industrial conditions up to \qty{120}{\meter} apart from the power box. +The remote controller is integrated into the LHCb network by a TCP/IP connection. +Utilising the Open Platform Communications (OPC) standard, this allows for the control and monitoring of the system within the aforementioned limits from outside the LHCb cavern. + + +\subsubsection{High Voltage} +\label{sec:hv} +The SiPMs are biased by power supplies manufactured by CAEN\footnote{CAEN S.p.A., Viareggio, Italy}. +The modules of type A1539BP~\autocite{caen-module} feature \num{32} channels that are accessible through two DB25 connectors. +The output voltage of each channel can be set between \qtyrange[range-phrase={ and }]{0}{100}{\volt} and deliver up to \qty{20}{\milli\ampere}. +Even though this voltage range is not usually referred to as high voltage (HV), the term will be used throughout this thesis as counterpart to the \qty{8}{V} LV as provided by the MARATON power supplies. +The accuracy of the set voltage is stated as $\qty{\pm 0.05}{\percent}\qty{\pm 50}{\milli\volt}$. +The ramp-up and ramp-down rates can be individually adjusted for each channel. + +The boards are equipped with both current and voltage protections. +The maximum output voltage can be set on a hardware level through a potentiometer that is accessible on the front panel. +It applies to all 32 channels. +Further restrictions on current and voltage limitations are adjustable in software on a per-channel basis. +In addition, it allows for the modification of the trip time after which a channel is turned off when the current limit is exceeded. + +At the \scifitracker{}, each HV channel biases four SiPM arrays corresponding to one fibre mat. +Intermediary switch panels allow to disable individual SiPM dies to not interfere with neighbouring dies in case of defects. +The HV modules are operated in CAEN crates of type SY4527~\autocite{caen-crate}. +Besides from housing up to 16 boards, each crate contains a fan tray section with six fans, and a \qty{600}{\watt} primary power supply unit (PSU). +Depending on the load, up to three additional booster PSUs can be installed. +The crates used for the \scifitracker{} will be expanded with one additional \qty{1200}{\watt} booster PSU of type A4533, allowing for the operation of ten A1539BP modules at maximum load. +For controlling the HV remotely, each crate includes a CPU and Gigabit Ethernet interface that allows for the integration into the LHCb network. + + + +\subsection{Cooling} +Two different types of cooling circuits are implemented in the \scifitracker{}. + +\subsubsection{Water Cooling} +During operation, the front-end electronics heat up significantly. +To limit the temperature to a maximum of \qty{50}{\celsius}, a water cooling scheme inspired by the OT is implemented~\autocite{scifi-tdr}. +To allow for an efficient heat transfer, the ROBs are tightly screwed on aluminium cooling blocks. +The cooling water flows through a straight copper pipe that traverses the cooling blocks of 5-6 neighbouring ROBs depending on the tracking station. +A \qty{180}{\degree} bend behind the last ROB guides the water to the return pipe that traverses the cooling blocks in reverse order, thereby also contributing to the cooling process. + +Based on a heat dissipation close to \qty{100}{\watt} per ROB, it was estimated that a flow rate of \qty{2.5}{\liter/\minute} per row of 5-6 ROBs is required. +At this rate, the water temperature is expected to increase by \qty{3}{\celsius}. +It is foreseen to use chilled and demineralised water with a temperature of \qty{16}{\celsius} at the inlet~\autocite{water-cooling-requirements}. + + +\subsubsection{Novec Cooling} +\label{sec:novec} +As outlined in \cref{sec:sipm}, the SiPMs need to be cooled to \qty{-40}{\celsius} to mitigate the drastic increase of the dark count rate due to radiation damages. +A complex infrastructure is needed to achieve the required cooling performance. +The coolant used for that purpose is Novec 649 distributed by 3M\footnote{3M, Saint Paul, Minnesota, USA}. +The fluid has similar thermo-physical properties as Perfluorohexane $\text{C}_{6}\text{F}_{14}$ that has been widely used in previous low-temperature cooling applications at the LHC. +Comparable with $\text{C}_{6}\text{F}_{14}$, it is non-combustible, volatile, dielectric and practically non-toxic~\autocite{scifi-tdr}. +However, due to its much lower global warming potential (GWP) around 1, Novec has been chosen as the superior alternative. + +\begin{figure} + \centering + \includegraphics[width=0.8\textwidth]{figures/scifi/Coldbox} + \caption{ + Cross-sectional view of a SciFi cold box with its components (left), as well as a thermal simulation (right). + The SiPM signals are transmitted through the flex PCB to the front-end electronics located above. + Images adapted from~\autocite{scifi-tdr}. + } + \label{fig:coldbox} +\end{figure} + +The coolant is circulated through a titanium cooling bar to which the SiPMs are glued. +The structure is surrounded by an insulating box, which is referred to as cold box. +A cross-sectional view of a cold box is shown in \vref{fig:coldbox}. +Each box contains sixteen SiPMs corresponding to one fibre module and ROB. +A pair of inlet and outlet bellows allow for a flexible connection of the individual cold boxes to the cooling circuit. +The Novec supply lines as well as the bellows are vacuum insulated. + +To avoid condensation and ice formation inside the cold box due to the low temperatures, a system is implemented that constantly flushes the boxes with a dry gas (either dried air or nitrogen). +During the commissioning of the first detector parts (see \cref{ch:commissioning}), it was found that condensation can also occur towards the outside. +Therefore, a heating system has been developed that covers the surface of the cold boxes, as well as the Novec bellows and dry gas outlets. +It consists of Kapton isolated heating wires that are twisted around the mentioned parts. +Same as for the front-end electronics, the required heating power is provided by MARATON power supplies. + + +\subsection{Mechanical Support Structure} +\label{sec:c-frames} +The individual detector modules are carried by C-shaped mounting frames. +The complete detector consists of a total of 12 of these so-called C-Frames that are arranged on both sides of the beam pipe. +They are mounted on guide rails, which facilitates the installation and also allows for quick access in case of required maintenances. + +\begin{figure} + \centering + \includegraphics[width=0.8\textwidth]{figures/scifi/C-Frame} + \caption{ + Schematic illustration of a C-Frame of type SX that carries the detector modules, front-end electronics, and the various infrastructure components. + The \scifitracker{} consists of 12 of these frames. + Image adapted from Ref.~\autocite{c-frames}. + } + \label{fig:c-frame} +\end{figure} + +One C-Frame carries two layers with 5-6 fibre modules each depending on the associated tracking station. +While the modules in one layer are oriented vertically (i.e. in $y$-direction within the LHCb coordinate system), the modules in the second layer are tilted by \qty{5}{\degree} -- the so-called \textbf{s}tereo layer. +Having two different types of C-Frames is sufficient to form the typical \textit{x-u-v-x} geometry (see \cref{sec:upgrade-motivation}) in each station on both sides of the beam pipe. +They are denoted as C-Frames of type XS and SX, depending on the order of the two layers when having the vertical bar of the frame on the right-hand side. + +In addition to the modules, the C-Frames also provide the framework for the various components of the detector infrastructure as described before. +They guide the low and high voltage cables to the ROBs, as well as the pipes for the water and Novec cooling. +Moreover, cable trays are mounted on the frames to allow for the installation of the optical cables for data transmission and control of the front-end electronics. +A schematic representation of a \cframe{} with its components is shown in \vref{fig:c-frame}. + +\section{Tracking Performance} +\label{sec:testbeam} +During the preparation of this thesis and throughout the development phase of the \scifitracker{}, multiple test beam campaigns have been conducted in order to evaluate its performance, in particular the tracking capabilities. +The most recent one took place during two weeks in July 2018 at the CERN Super Proton Synchrotron (SPS) North Area~\autocite{sps-north-area}. +The beam in the H8 beamline was set to a width of about \qty{1}{\centi\meter} and provided pions and muons with momenta around \qty{180}{GeV/s}. + +The experimental setup as shown in \vref{fig:testbeam-setup} consisted of two full-width half-length fibre modules with the mirror on one end and \num{16} SiPM arrays on the other. +The SiPM signals were read out by two ROBs that transferred the data via optical links to a mini version of the upgraded LHCb DAQ system~\autocite{minidaq}. +Reference tracks used for the determination of the tracking performance parameters were provided with an uncertainty of approximately \qty{8}{\micro\meter} by a TimePix3 telescope located downstream of the modules~\autocite{timepix}. + +\begin{figure} + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/scifi/Testbeam} + \caption{Experimental setup} + \label{fig:testbeam-setup} + \end{subfigure} + \hfill + \begin{subfigure}{0.49\linewidth} + \centering + \includegraphics[width=1.0\textwidth]{figures/scifi/Resolution} + \caption{Resolution} + \label{fig:testbeam-resolution} + \end{subfigure} + \caption{ + Test beam setup consisting of two fibre modules along with the corresponding front-end electronics (a) and measured hit resolution in the bending direction ($x$-axis) within the LHCb coordinate system (b). + The particle beam provided in the SPS North Area at CERN is indicated by the orange arrow. + } + \label{fig:testbeam} +\end{figure} + +The campaign was a great success as it could be shown that a single hit efficiency beyond \qty{99}{\percent} can be reached. +In addition, as shown in \vref{fig:testbeam-resolution}, the resolution in the bending direction ($x$-axis) within the LHCb coordinate system was measured to be about \qty{65}{\micro\meter}. +Thus it could be verified that the corresponding performance requirements as listed in \cref{sec:performance-requirements} are fulfilled. + +This test beam was the first one during which the full chain of front-end electronics along with the new DAQ system was tested. +In addition, all SciFi related components in use were (near-)production versions. +Using this setup, it was possible for the first time to read out the 32 optical links at the LHC clock frequency of \qty{40}{\mega\hertz} resulting in a total data rate of about \qty{150}{\giga\bit/s}. +Getting the two systems to work with each other was not a trivial task and required for extensive preparations, which have been a significant part in the course of this thesis. +The software that had to be developed for it also formed the basis for the commissioning of the front-end electronics. +More details on this follow in \cref{ch:commissioning}. diff --git a/testbeams.tex b/testbeams.tex new file mode 100644 index 0000000..551dfaa --- /dev/null +++ b/testbeams.tex @@ -0,0 +1,20 @@ +\chapter{Testbeam Campaigns} +\label{ch:testbeams} + + +\section{DESY 2017} +\label{sec:tb2017} + +\subsection{Efficiency} + +\subsection{Spillover} + + +\section{SPS 2018} +\label{sec:tb2018} + +\subsection{Efficiency} + +\subsection{Resolution} + +\subsection{Spillover} diff --git a/titlepage.tex b/titlepage.tex new file mode 100644 index 0000000..d04fe23 --- /dev/null +++ b/titlepage.tex @@ -0,0 +1,57 @@ +%% this will generate title pages similar to the template provided +%% by the Department of Physics and Astronomy Heidelberg +%% +%% More information: +%% http://www.physik.uni-heidelberg.de/aktuelles/studium/ +%% (PDF link: ...studium/download/145/Vorlage_Diplomarbeit_Formular.pdf) + +%% Titleintro +\thispagestyle{empty} +\begin{center} + \fontsize{36}{36} \selectfont \sffamily + \textbf{DISSERTATION} \\ + \vskip 0.2in + \large + submitted to the \\ + Combined Faculty of Mathematics, Engineering and Natural Sciences \\ + of the Ruperto Carola University of Heidelberg, Germany \\ + for the degree of \\ + \Large + Doctor of Natural Sciences + \par\vfill\normalfont + \Large + put forward by\\ + \textbf{Daniel Alexander Berninghoff}\\ + born in Lüdenscheid\\ + \textit{Oral examination: 25.05.2022} +\end{center} + +\newpage +\null +\thispagestyle{empty} +\newpage + +%% Titlepage +\thispagestyle{empty} +\begin{center} + \huge \bfseries\sffamily + \begin{doublespace} + Commissioning of the Front-End Electronics of the LHCb Scintillating Fibre Tracker + \end{doublespace} + \large + \par + \vfill + \large\normalfont + Referees:\\ + Prof. Dr. Ulrich Uwer \\ + Prof. Dr. Klaus Reygers +\end{center} +\par +\vspace{5\baselineskip} + +\clearpage +\thispagestyle{empty} +\phantom{a} +\vfill +\vfill +\clearpage