HITDAQ/FPGA_firmware/README.txt
2024-10-15 14:03:00 +02:00

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This firmware is generted from Simple Socket Server Example.
M.Dziewiecki created sensor_interface.v in 2019, which controls, collects, and sends ADC data to ethernet.
L.Qin created algo_top_cl_cali_rms.v in 2024, which reconstructs the position and sigma from the ADC data.