104 lines
3.1 KiB
C
104 lines
3.1 KiB
C
/*
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* linker.h - Linker script mapping information
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*
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* Machine generated for CPU 'cpu' in SOPC Builder design 'q_sys'
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* SOPC Builder design path: D:/hit20v3/software/hit_pat/q_sys.sopcinfo
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*
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* Generated: Fri Oct 11 10:12:20 CEST 2024
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*/
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/*
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* DO NOT MODIFY THIS FILE
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*
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* Changing this file will have subtle consequences
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* which will almost certainly lead to a nonfunctioning
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* system. If you do modify this file, be aware that your
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* changes will be overwritten and lost when this file
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* is generated again.
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*
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* DO NOT MODIFY THIS FILE
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*/
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/*
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* License Agreement
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*
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* Copyright (c) 2008
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* Altera Corporation, San Jose, California, USA.
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* All rights reserved.
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*
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* Permission is hereby granted, free of charge, to any person obtaining a
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* copy of this software and associated documentation files (the "Software"),
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* to deal in the Software without restriction, including without limitation
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* the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the
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* Software is furnished to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in
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* all copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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* FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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* AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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* LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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* DEALINGS IN THE SOFTWARE.
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*
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* This agreement shall be governed in all respects by the laws of the State
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* of California and by the laws of the United States of America.
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*/
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#ifndef __LINKER_H_
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#define __LINKER_H_
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/*
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* BSP controls alt_load() behavior in crt0.
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*
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*/
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#define ALT_LOAD_EXPLICITLY_CONTROLLED
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/*
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* Base address and span (size in bytes) of each linker region
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*
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*/
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#define CALIBRATION_RAM_REGION_BASE 0x18403400
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#define CALIBRATION_RAM_REGION_SPAN 640
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#define DDR3_RAM_BEFORE_EXCEPTION_REGION_BASE 0x8000000
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#define DDR3_RAM_BEFORE_EXCEPTION_REGION_SPAN 288
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#define DDR3_RAM_REGION_BASE 0x8000120
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#define DDR3_RAM_REGION_SPAN 134217440
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#define DESCRIPTOR_MEMORY_REGION_BASE 0x18400000
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#define DESCRIPTOR_MEMORY_REGION_SPAN 8192
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#define EXT_FLASH_AVL_MEM_REGION_BASE 0x14000020
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#define EXT_FLASH_AVL_MEM_REGION_SPAN 67108832
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#define ONCHIP_FLASH_DATA_REGION_BASE 0x18200000
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#define ONCHIP_FLASH_DATA_REGION_SPAN 1441792
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#define RESET_REGION_BASE 0x14000000
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#define RESET_REGION_SPAN 32
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/*
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* Devices associated with code sections
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*
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*/
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#define ALT_EXCEPTIONS_DEVICE DDR3_RAM
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#define ALT_RESET_DEVICE EXT_FLASH_AVL_MEM
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#define ALT_RODATA_DEVICE DDR3_RAM
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#define ALT_RWDATA_DEVICE DDR3_RAM
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#define ALT_TEXT_DEVICE DDR3_RAM
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/*
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* Initialization code at the reset address is allowed (e.g. no external bootloader).
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*
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*/
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#define ALT_ALLOW_CODE_AT_RESET
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#endif /* __LINKER_H_ */
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