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5c7a30cdf6
HITDAQ/FPGA_firmware/clkctrl/synthesis/clkctrl.debuginfo
Liqing Qin 5c7a30cdf6 git code
2024-10-11 14:49:54 +02:00

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<?xml version="1.0" encoding="UTF-8"?>
<EnsembleReport name="clkctrl" kind="system" version="19.1" fabric="QSYS">
<!-- Format version 19.1 670 (Future versions may contain additional information.) -->
<!-- 2023.06.07.19:47:52 -->
<!-- A collection of modules and connections -->
<parameter name="clockCrossingAdapter">
<type>com.altera.sopcmodel.ensemble.EClockAdapter</type>
<value>HANDSHAKE</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="device">
<type>java.lang.String</type>
<value>10M50DAF484C6GES</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>MAX10FPGA</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="deviceSpeedGrade">
<type>java.lang.String</type>
<value>6</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="fabricMode">
<type>com.altera.sopcmodel.ensemble.Ensemble$EFabricMode</type>
<value>QSYS</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="generationId">
<type>int</type>
<value>1686160072</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="globalResetBus">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="hdlLanguage">
<type>com.altera.entityinterfaces.moduleext.IModuleGenerateHDL$HDLLanguage</type>
<value>VERILOG</value>
<derived>false</derived>
<enabled>false</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="hideFromIPCatalog">
<type>boolean</type>
<value>true</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="lockedInterfaceDefinition">
<type>com.altera.sopcmodel.definition.BoundaryDefinition</type>
<value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="maxAdditionalLatency">
<type>int</type>
<value>1</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="projectName">
<type>java.lang.String</type>
<value>m10_rgmii.qpf</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="sopcBorderPoints">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="systemHash">
<type>long</type>
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="testBenchDutName">
<type>java.lang.String</type>
<value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="timeStamp">
<type>long</type>
<value>0</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="useTestBenchNamingPattern">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<module
name="altclkctrl_0"
kind="altclkctrl"
version="19.1"
path="altclkctrl_0">
<!-- Describes a single module. Module parameters are
the requested settings for a module instance. -->
<parameter name="DEVICE_FAMILY">
<type>java.lang.String</type>
<value>MAX10FPGA</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>false</visible>
<valid>true</valid>
<sysinfo_type>DEVICE_FAMILY</sysinfo_type>
</parameter>
<parameter name="CLOCK_TYPE">
<type>int</type>
<value>1</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="NUMBER_OF_CLOCKS">
<type>int</type>
<value>1</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="ENA_REGISTER_MODE">
<type>int</type>
<value>1</value>
<derived>false</derived>
<enabled>false</enabled>
<visible>false</visible>
<valid>true</valid>
</parameter>
<parameter name="GUI_USE_ENA">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="USE_GLITCH_FREE_SWITCH_OVER_IMPLEMENTATION">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<interface name="altclkctrl_input" kind="conduit_end" version="19.1">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
<assignment>
<name>ui.blockdiagram.direction</name>
<value>input</value>
</assignment>
<parameter name="associatedClock">
<type>java.lang.String</type>
<value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="associatedReset">
<type>java.lang.String</type>
<value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<type>conduit</type>
<isStart>false</isStart>
<port>
<name>inclk</name>
<direction>Input</direction>
<width>1</width>
<role>inclk</role>
</port>
</interface>
<interface name="altclkctrl_output" kind="conduit_end" version="19.1">
<!-- The connection points exposed by a module instance for the
particular module parameters. Connection points and their
parameters are a RESULT of the module parameters. -->
<assignment>
<name>ui.blockdiagram.direction</name>
<value>output</value>
</assignment>
<parameter name="associatedClock">
<type>java.lang.String</type>
<value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="associatedReset">
<type>java.lang.String</type>
<value></value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="deviceFamily">
<type>java.lang.String</type>
<value>UNKNOWN</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<parameter name="generateLegacySim">
<type>boolean</type>
<value>false</value>
<derived>false</derived>
<enabled>true</enabled>
<visible>true</visible>
<valid>true</valid>
</parameter>
<type>conduit</type>
<isStart>false</isStart>
<port>
<name>outclk</name>
<direction>Output</direction>
<width>1</width>
<role>outclk</role>
</port>
</interface>
</module>
<plugin>
<instanceCount>1</instanceCount>
<name>altclkctrl</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IModule</subtype>
<displayName>ALTCLKCTRL Intel FPGA IP</displayName>
<version>19.1</version>
</plugin>
<plugin>
<instanceCount>2</instanceCount>
<name>conduit_end</name>
<type>com.altera.entityinterfaces.IElementClass</type>
<subtype>com.altera.entityinterfaces.IMutableConnectionPoint</subtype>
<displayName>Conduit</displayName>
<version>19.1</version>
</plugin>
<reportVersion>19.1 670</reportVersion>
<uniqueIdentifier>02424A4180BE0000018896F8DFE3</uniqueIdentifier>
</EnsembleReport>
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