# memory.gdb - GDB memory region definitions
#
# Machine generated for CPU 'cpu' in SOPC Builder design 'q_sys'
# SOPC Builder design path: D:/hit20v3/software/hit_pat/q_sys.sopcinfo
#
# Generated: Fri Oct 11 10:12:20 CEST 2024

# DO NOT MODIFY THIS FILE
#
# Changing this file will have subtle consequences
# which will almost certainly lead to a nonfunctioning
# system. If you do modify this file, be aware that your
# changes will be overwritten and lost when this file
# is generated again.
#
# DO NOT MODIFY THIS FILE

# License Agreement
#
# Copyright (c) 2008
# Altera Corporation, San Jose, California, USA.
# All rights reserved.
#
# Permission is hereby granted, free of charge, to any person obtaining a
# copy of this software and associated documentation files (the "Software"),
# to deal in the Software without restriction, including without limitation
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# Define memory regions for each memory connected to the CPU.
# The cache attribute is specified which improves GDB performance
# by allowing GDB to cache memory contents on the host.

# ddr3_ram
memory 0x8000000 0x10000000 cache

# ext_flash_avl_mem
memory 0x14000000 0x18000000 cache

# onchip_flash_data
memory 0x18200000 0x18360000 cache

# descriptor_memory
memory 0x18400000 0x18402000 cache

# calibration_ram
memory 0x18403400 0x18403680 cache