522 lines
20 KiB
XML
522 lines
20 KiB
XML
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<?xml version="1.0" encoding="UTF-8"?>
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<deploy
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date="2024.07.18.17:16:55"
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outputDirectory="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/">
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<perimeter>
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<parameter
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name="AUTO_GENERATION_ID"
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type="Integer"
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defaultValue="0"
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_UNIQUE_ID"
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type="String"
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defaultValue=""
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_DEVICE_FAMILY"
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type="String"
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defaultValue="MAX 10"
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_DEVICE"
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type="String"
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defaultValue="10M50DAF484C6GES"
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_DEVICE_SPEEDGRADE"
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type="String"
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defaultValue="6"
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_SENSOR_RECON_0_CALIBRATION_RAM_INTERFACE_ADDRESS_MAP"
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type="AddressMap"
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defaultValue=""
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_SENSOR_RECON_0_CALIBRATION_RAM_INTERFACE_ADDRESS_WIDTH"
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type="AddressWidthType"
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defaultValue=""
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_SENSOR_RECON_0_CLK_CLOCK_RATE"
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type="Long"
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defaultValue="-1"
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_SENSOR_RECON_0_CLK_CLOCK_DOMAIN"
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type="Integer"
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defaultValue="-1"
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onHdl="0"
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affectsHdl="1" />
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<parameter
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name="AUTO_SENSOR_RECON_0_CLK_RESET_DOMAIN"
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type="Integer"
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defaultValue="-1"
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onHdl="0"
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affectsHdl="1" />
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<interface
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name="sensor_recon_0_calibration_ram_interface"
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kind="avalon"
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start="1">
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<property name="adaptsTo" value="" />
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<property name="addressGroup" value="0" />
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<property name="addressUnits" value="WORDS" />
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<property name="alwaysBurstMaxBurst" value="false" />
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<property name="associatedClock" value="sensor_recon_0_clk" />
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<property name="associatedReset" value="sensor_recon_0_rst" />
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<property name="bitsPerSymbol" value="8" />
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<property name="burstOnBurstBoundariesOnly" value="false" />
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<property name="burstcountUnits" value="WORDS" />
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<property name="constantBurstBehavior" value="false" />
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<property name="dBSBigEndian" value="false" />
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<property name="doStreamReads" value="false" />
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<property name="doStreamWrites" value="false" />
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<property name="holdTime" value="0" />
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<property name="interleaveBursts" value="false" />
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<property name="isAsynchronous" value="false" />
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<property name="isBigEndian" value="false" />
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<property name="isReadable" value="false" />
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<property name="isWriteable" value="false" />
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<property name="linewrapBursts" value="false" />
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<property name="maxAddressWidth" value="32" />
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<property name="maximumPendingReadTransactions" value="0" />
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<property name="maximumPendingWriteTransactions" value="0" />
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<property name="readLatency" value="0" />
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<property name="readWaitTime" value="1" />
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<property name="registerIncomingSignals" value="false" />
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<property name="registerOutgoingSignals" value="false" />
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<property name="setupTime" value="0" />
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<property name="timingUnits" value="Cycles" />
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<property name="writeWaitTime" value="0" />
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<port
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name="sensor_recon_0_calibration_ram_interface_address"
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direction="output"
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role="address"
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width="9" />
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<port
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name="sensor_recon_0_calibration_ram_interface_read"
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direction="output"
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role="read"
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width="1" />
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<port
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name="sensor_recon_0_calibration_ram_interface_readdata"
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direction="input"
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role="readdata"
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width="16" />
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<port
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name="sensor_recon_0_calibration_ram_interface_waitrequest"
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direction="input"
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role="waitrequest"
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width="1" />
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</interface>
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<interface name="sensor_recon_0_clk" kind="clock" start="0">
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<property name="clockRate" value="0" />
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<property name="externallyDriven" value="false" />
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<property name="ptfSchematicName" value="" />
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<port name="sensor_recon_0_clk_clk" direction="input" role="clk" width="1" />
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</interface>
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<interface name="sensor_recon_0_csr" kind="avalon" start="0">
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<property name="addressAlignment" value="DYNAMIC" />
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<property name="addressGroup" value="0" />
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<property name="addressSpan" value="16" />
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<property name="addressUnits" value="WORDS" />
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<property name="alwaysBurstMaxBurst" value="false" />
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<property name="associatedClock" value="sensor_recon_0_clk" />
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<property name="associatedReset" value="sensor_recon_0_rst" />
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<property name="bitsPerSymbol" value="8" />
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<property name="bridgedAddressOffset" value="0" />
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<property name="bridgesToMaster" value="" />
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<property name="burstOnBurstBoundariesOnly" value="false" />
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<property name="burstcountUnits" value="WORDS" />
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<property name="constantBurstBehavior" value="false" />
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<property name="explicitAddressSpan" value="0" />
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<property name="holdTime" value="0" />
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<property name="interleaveBursts" value="false" />
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<property name="isBigEndian" value="false" />
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<property name="isFlash" value="false" />
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<property name="isMemoryDevice" value="false" />
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<property name="isNonVolatileStorage" value="false" />
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<property name="linewrapBursts" value="false" />
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<property name="maximumPendingReadTransactions" value="0" />
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<property name="maximumPendingWriteTransactions" value="0" />
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<property name="minimumUninterruptedRunLength" value="1" />
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<property name="printableDevice" value="false" />
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<property name="readLatency" value="0" />
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<property name="readWaitStates" value="1" />
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<property name="readWaitTime" value="1" />
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<property name="registerIncomingSignals" value="false" />
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<property name="registerOutgoingSignals" value="false" />
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<property name="setupTime" value="0" />
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<property name="timingUnits" value="Cycles" />
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<property name="transparentBridge" value="false" />
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<property name="wellBehavedWaitrequest" value="false" />
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<property name="writeLatency" value="0" />
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<property name="writeWaitStates" value="0" />
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<property name="writeWaitTime" value="0" />
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<port
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name="sensor_recon_0_csr_address"
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direction="input"
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role="address"
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width="2" />
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<port
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name="sensor_recon_0_csr_read"
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direction="input"
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role="read"
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width="1" />
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<port
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name="sensor_recon_0_csr_readdata"
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direction="output"
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role="readdata"
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width="32" />
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<port
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name="sensor_recon_0_csr_write"
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direction="input"
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role="write"
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width="1" />
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<port
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name="sensor_recon_0_csr_writedata"
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direction="input"
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role="writedata"
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width="32" />
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<port
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name="sensor_recon_0_csr_byteenable"
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direction="input"
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role="byteenable"
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width="4" />
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</interface>
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<interface name="sensor_recon_0_data_out" kind="avalon_streaming" start="1">
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<property name="associatedClock" value="sensor_recon_0_clk" />
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<property name="associatedReset" value="sensor_recon_0_rst" />
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<property name="beatsPerCycle" value="1" />
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<property name="dataBitsPerSymbol" value="8" />
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<property name="emptyWithinPacket" value="false" />
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<property name="errorDescriptor" value="" />
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<property name="firstSymbolInHighOrderBits" value="true" />
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<property name="highOrderSymbolAtMSB" value="false" />
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<property name="maxChannel" value="0" />
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<property name="packetDescription" value="" />
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<property name="readyLatency" value="0" />
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<property name="symbolsPerBeat" value="1" />
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<port
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name="sensor_recon_0_data_out_endofpacket"
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direction="output"
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role="endofpacket"
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width="1" />
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<port
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name="sensor_recon_0_data_out_data"
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direction="output"
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role="data"
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width="32" />
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<port
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name="sensor_recon_0_data_out_empty"
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direction="output"
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role="empty"
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width="2" />
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<port
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name="sensor_recon_0_data_out_ready"
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direction="input"
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role="ready"
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width="1" />
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<port
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name="sensor_recon_0_data_out_startofpacket"
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direction="output"
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role="startofpacket"
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width="1" />
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<port
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name="sensor_recon_0_data_out_valid"
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direction="output"
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role="valid"
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width="1" />
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</interface>
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<interface name="sensor_recon_0_rst" kind="reset" start="0">
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<property name="associatedClock" value="sensor_recon_0_clk" />
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<property name="synchronousEdges" value="DEASSERT" />
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<port
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name="sensor_recon_0_rst_reset"
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direction="input"
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role="reset"
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width="1" />
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</interface>
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<interface name="sensor_recon_0_sensor" kind="conduit" start="0">
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<property name="associatedClock" value="sensor_recon_0_clk" />
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<property name="associatedReset" value="" />
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<port
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name="sensor_recon_0_sensor_in_adc_data"
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direction="input"
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role="in_adc_data"
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width="5" />
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<port
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name="sensor_recon_0_sensor_in_trg"
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direction="input"
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role="in_trg"
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width="1" />
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<port
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name="sensor_recon_0_sensor_out_adc_clk"
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direction="output"
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role="out_adc_clk"
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width="1" />
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<port
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name="sensor_recon_0_sensor_out_adc_cnv"
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direction="output"
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role="out_adc_cnv"
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width="1" />
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<port
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name="sensor_recon_0_sensor_out_sensor_clk"
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direction="output"
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role="out_sensor_clk"
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width="1" />
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<port
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name="sensor_recon_0_sensor_out_sensor_gain"
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direction="output"
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role="out_sensor_gain"
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width="1" />
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<port
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name="sensor_recon_0_sensor_out_sensor_rst"
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direction="output"
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role="out_sensor_rst"
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width="1" />
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</interface>
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<interface name="sensor_recon_0_status_out" kind="conduit" start="0">
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<property name="associatedClock" value="sensor_recon_0_clk" />
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<property name="associatedReset" value="" />
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<port
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name="sensor_recon_0_status_out_status_out"
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direction="output"
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role="status_out"
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width="8" />
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</interface>
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<interface name="sensor_recon_0_synchro" kind="conduit" start="0">
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<property name="associatedClock" value="sensor_recon_0_clk" />
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<property name="associatedReset" value="" />
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<port
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name="sensor_recon_0_synchro_ext_input"
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direction="input"
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role="ext_input"
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width="8" />
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<port
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name="sensor_recon_0_synchro_serial_rx"
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direction="input"
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role="serial_rx"
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width="1" />
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<port
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name="sensor_recon_0_synchro_serial_tx"
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direction="output"
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role="serial_tx"
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width="1" />
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</interface>
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</perimeter>
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<entity
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path=""
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parameterizationKey="unsaved:1.0:AUTO_DEVICE=10M50DAF484C6GES,AUTO_DEVICE_FAMILY=MAX 10,AUTO_DEVICE_SPEEDGRADE=6,AUTO_GENERATION_ID=1721315815,AUTO_SENSOR_RECON_0_CALIBRATION_RAM_INTERFACE_ADDRESS_MAP=,AUTO_SENSOR_RECON_0_CALIBRATION_RAM_INTERFACE_ADDRESS_WIDTH=AddressWidth = -1,AUTO_SENSOR_RECON_0_CLK_CLOCK_DOMAIN=-1,AUTO_SENSOR_RECON_0_CLK_CLOCK_RATE=-1,AUTO_SENSOR_RECON_0_CLK_RESET_DOMAIN=-1,AUTO_UNIQUE_ID=(sensor_recon:1:)"
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instancePathKey="unsaved"
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kind="unsaved"
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version="1.0"
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name="unsaved">
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<parameter name="AUTO_SENSOR_RECON_0_CLK_CLOCK_DOMAIN" value="-1" />
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<parameter
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name="AUTO_SENSOR_RECON_0_CALIBRATION_RAM_INTERFACE_ADDRESS_MAP"
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value="" />
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<parameter name="AUTO_GENERATION_ID" value="1721315815" />
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<parameter name="AUTO_DEVICE" value="10M50DAF484C6GES" />
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<parameter name="AUTO_DEVICE_FAMILY" value="MAX 10" />
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<parameter name="AUTO_SENSOR_RECON_0_CLK_CLOCK_RATE" value="-1" />
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<parameter name="AUTO_UNIQUE_ID" value="" />
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<parameter name="AUTO_SENSOR_RECON_0_CLK_RESET_DOMAIN" value="-1" />
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<parameter name="AUTO_DEVICE_SPEEDGRADE" value="6" />
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<parameter
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name="AUTO_SENSOR_RECON_0_CALIBRATION_RAM_INTERFACE_ADDRESS_WIDTH"
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value="AddressWidth = -1" />
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<generatedFiles>
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/unsaved.v"
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type="VERILOG" />
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</generatedFiles>
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<childGeneratedFiles>
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/rms.sv"
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type="SYSTEM_VERILOG"
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attributes="" />
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/stl2sts.v"
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type="VERILOG"
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attributes="" />
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/calibration.v"
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type="VERILOG"
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attributes="" />
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/algo_top_cl_cali_rms.v"
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type="VERILOG"
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attributes="" />
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/sensor_interface.v"
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type="VERILOG"
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attributes="" />
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||
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/serial_rx.v"
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type="VERILOG"
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attributes="" />
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/serial_tx.v"
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||
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type="VERILOG"
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||
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attributes="" />
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<file
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path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/sensor_algo.v"
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type="VERILOG"
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||
|
attributes="TOP_LEVEL_FILE" />
|
||
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|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/bkg_subtraction_pipe.v"
|
||
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type="VERILOG"
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||
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attributes="" />
|
||
|
<file
|
||
|
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|
||
|
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|
||
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|
||
|
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|
||
|
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|
||
|
type="VERILOG"
|
||
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attributes="" />
|
||
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|
||
|
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||
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type="VERILOG"
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||
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attributes="" />
|
||
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|
||
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|
||
|
type="SYSTEM_VERILOG"
|
||
|
attributes="" />
|
||
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|
||
|
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|
||
|
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|
||
|
attributes="" />
|
||
|
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|
||
|
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|
||
|
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|
||
|
attributes="" />
|
||
|
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|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/ram4bkg.v"
|
||
|
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|
||
|
attributes="" />
|
||
|
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|
||
|
<sourceFiles>
|
||
|
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|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/unsaved.qsys" />
|
||
|
</sourceFiles>
|
||
|
<childSourceFiles>
|
||
|
<file
|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/sensor_recon_hw.tcl" />
|
||
|
</childSourceFiles>
|
||
|
<messages>
|
||
|
<message level="Debug" culprit="unsaved">queue size: 0 starting:unsaved "unsaved"</message>
|
||
|
<message level="Progress" culprit="min"></message>
|
||
|
<message level="Progress" culprit="max"></message>
|
||
|
<message level="Progress" culprit="current"></message>
|
||
|
<message level="Debug">Transform: CustomInstructionTransform</message>
|
||
|
<message level="Debug">No custom instruction connections, skipping transform </message>
|
||
|
<message level="Debug" culprit="merlin_custom_instruction_transform"><![CDATA[After transform: <b>1</b> modules, <b>0</b> connections]]></message>
|
||
|
<message level="Debug">Transform: MMTransform</message>
|
||
|
<message level="Debug">Transform: InterruptMapperTransform</message>
|
||
|
<message level="Debug">Transform: InterruptSyncTransform</message>
|
||
|
<message level="Debug">Transform: InterruptFanoutTransform</message>
|
||
|
<message level="Debug">Transform: AvalonStreamingTransform</message>
|
||
|
<message level="Debug">Transform: ResetAdaptation</message>
|
||
|
<message level="Debug" culprit="unsaved"><![CDATA["<b>unsaved</b>" reuses <b>sensor_recon</b> "<b>submodules/sensor_algo</b>"]]></message>
|
||
|
<message level="Debug" culprit="unsaved">queue size: 0 starting:sensor_recon "submodules/sensor_algo"</message>
|
||
|
<message level="Info" culprit="sensor_recon_0"><![CDATA["<b>unsaved</b>" instantiated <b>sensor_recon</b> "<b>sensor_recon_0</b>"]]></message>
|
||
|
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|
||
|
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|
||
|
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|
||
|
path="submodules/"
|
||
|
parameterizationKey="sensor_recon:1:"
|
||
|
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|
||
|
kind="sensor_recon"
|
||
|
version="1"
|
||
|
name="sensor_algo">
|
||
|
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|
||
|
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|
||
|
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|
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|
||
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attributes="" />
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||
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|
||
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||
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|
||
|
attributes="" />
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||
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|
||
|
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|
||
|
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|
||
|
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|
||
|
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|
||
|
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|
||
|
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|
||
|
attributes="" />
|
||
|
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|
||
|
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|
||
|
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|
||
|
attributes="" />
|
||
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|
||
|
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|
||
|
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|
||
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|
||
|
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|
||
|
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|
||
|
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|
||
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|
||
|
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|
||
|
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|
||
|
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|
||
|
attributes="TOP_LEVEL_FILE" />
|
||
|
<file
|
||
|
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|
||
|
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||
|
attributes="" />
|
||
|
<file
|
||
|
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|
||
|
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|
||
|
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|
||
|
<file
|
||
|
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|
||
|
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|
||
|
attributes="" />
|
||
|
<file
|
||
|
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|
||
|
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|
||
|
attributes="" />
|
||
|
<file
|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/altera_avalon_st_splitter.sv"
|
||
|
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|
||
|
attributes="" />
|
||
|
<file
|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/div.v"
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||
|
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||
|
attributes="" />
|
||
|
<file
|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/sqrt.v"
|
||
|
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|
||
|
attributes="" />
|
||
|
<file
|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/q_sys/synthesis/submodules/ram4bkg.v"
|
||
|
type="VERILOG"
|
||
|
attributes="" />
|
||
|
</generatedFiles>
|
||
|
<childGeneratedFiles/>
|
||
|
<sourceFiles>
|
||
|
<file
|
||
|
path="/auto/work/qinliqing/intelFPGA_lite/19.1/dev_room_qlq/sensor_algo_qsys/sensor_recon_hw.tcl" />
|
||
|
</sourceFiles>
|
||
|
<childSourceFiles/>
|
||
|
<instantiator instantiator="unsaved" as="sensor_recon_0" />
|
||
|
<messages>
|
||
|
<message level="Debug" culprit="unsaved">queue size: 0 starting:sensor_recon "submodules/sensor_algo"</message>
|
||
|
<message level="Info" culprit="sensor_recon_0"><![CDATA["<b>unsaved</b>" instantiated <b>sensor_recon</b> "<b>sensor_recon_0</b>"]]></message>
|
||
|
</messages>
|
||
|
</entity>
|
||
|
</deploy>
|