HITDAQ/FPGA_nios/hit_pat/inc/utils.h

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2024-10-15 16:39:23 +02:00
/******************************************************************************
* Copyright *
* Scintillating Fibre Beam Profile Monitor Software by Michal Dziewiecki, *
* Blake Leverington and Liqing Qin is licensed under CC BY 4.0 *
* https://creativecommons.org/licenses/by/4.0/ *
* funded by the Deutsche Forschungsgemeinschaft *
* (DFG, German Research Foundation) Projektnummer 419255448 *
* Project Leader: B.Leverington *
*******************************************************************************
* Create Date - Jul 31, 2019 *
* Author: M.Dziewiecki *
* Module - utils.h *
******************************************************************************/
//Various utils for various purposes
//Mainly wrappers on hardware
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#ifndef UTILS_H_
#define UTILS_H_
//Swap opdd/even bytes in a bunch of data to align endianness of shorts
void swap_bytes(unsigned char* array, int size_bytes);
void swap_quad(unsigned char* array, int size_bytes);
void reload_fpga(); //trigger FPGA reload
#define TRIGGER_MASTER 1
#define TRIGGER_SLAVE 0
void masterslave(alt_u8 master); //set trigger system to master or slave operation
void master_clock_period(alt_u32 period); //set period of the master frame timer
void master_clock_enable(alt_u8 en); //enable/disable pulse generation
void led_set(alt_u8 led_nr);
void led_clear(alt_u8 led_nr);
void led_toggle(alt_u8 led_nr);
void led4_blink_enable(alt_u8 en);
void set_delay(alt_u8 master, alt_u16 value);
#endif /* UTILS_H_ */