HITDAQ/FPGA_firmware/README.txt

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2024-10-15 11:25:38 +02:00
This firmware is generted from Simple Socket Server Example.
2024-10-15 16:39:23 +02:00
2024-10-15 11:25:38 +02:00
M.Dziewiecki created sensor_interface.v in 2019, which controls, collects, and sends ADC data to ethernet.
2024-10-15 16:39:23 +02:00
L.Qin created algo_top_cl_cali_rms.v in 2024, which reconstructs the position and sigma from the ADC data.